FPGARelated.com
Forums

JTAG Configuration

Started by Ivan October 26, 2004
Hi,

Did anyone know what is the Xilinx recommended pull-up register value
for the JTAG configuration pins (TCK, TMS, TDI, TDO and M0-M2) for
Virtex4?

Thanks,
Ivan
Ivan,

The JTAG is powered from the 2.5V Vccaux.

Austin

Ivan wrote:
> Hi, > > Did anyone know what is the Xilinx recommended pull-up register value > for the JTAG configuration pins (TCK, TMS, TDI, TDO and M0-M2) for > Virtex4? > > Thanks, > Ivan
Oops, hit return too soon.

See page 554 of the User's Guide.

See note 1.  Active pullup to Vccaux (2.5V)

Austin


Austin Lesea wrote:

> Ivan, > > The JTAG is powered from the 2.5V Vccaux. > > Austin > > Ivan wrote: > >> Hi, >> >> Did anyone know what is the Xilinx recommended pull-up register value >> for the JTAG configuration pins (TCK, TMS, TDI, TDO and M0-M2) for >> Virtex4? >> >> Thanks, >> Ivan
All,

Hold that thought.  The users guide is confusing (???).

In one section it states "open drain" and in another, it states "active 
pullup."

Will post as soon as I know,

Sorry for the confusion.

Austin
Ivan,

 From the designers:

"VCCO_0 can be powered with 2.5V or 3.3V and the JTAG interface
will work at that voltage. there is no need for any pull ups
or supporting resistors on these pins.

the user's guide will be fixed because it is plainly misleading."

Thanks for finding this for us!

Austin

Ivan wrote:
> Hi, > > Did anyone know what is the Xilinx recommended pull-up register value > for the JTAG configuration pins (TCK, TMS, TDI, TDO and M0-M2) for > Virtex4? > > Thanks, > Ivan