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CPLD + CAN bus

Started by Falk Salewski November 29, 2004
Hello everybody,

I want to connect a Xilinx CoolrunnerII (XC2c256) to the CAN-Bus. To make it 
easy I would like to use a ready to use CAN-bus driver chip (as much of the 
protocol implemented as possible). Any suggestions? How many of the CPLD 
resources does it take to initialize/communicate with the CAN-bus driver 
chip?

Thanks for your help!

Falk Salewski
Embedded Software Laboratory
RWTH  Aachen  University
----------------------------------------------------------------------- 


Falk Salewski <salewski@informatik.rwth-aachen.de> wrote:
: Hello everybody,

: I want to connect a Xilinx CoolrunnerII (XC2c256) to the CAN-Bus. To make
: it easy I would like to use a ready to use CAN-bus driver chip (as much of
: the  
: protocol implemented as possible). Any suggestions? How many of the CPLD 
: resources does it take to initialize/communicate with the CAN-bus driver 
: chip?

There is a CAN Protocoll Controller at www.opencores.org 

Bye
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Thank you very much for your reply.

However what I am looking for is how difficult is it to connect a CPLD to a 
CAN-controller chip like the SJA1000 
http://www-eu3.semiconductors.com/pip/SJA1000.html
and how many of the CPLD  resources  it takes to initialize/communicate with 
this CAN-controller.

bye
Falk

"Uwe Bonnes" <bon@elektron.ikp.physik.tu-darmstadt.de> schrieb im 
Newsbeitrag news:coensd$mh6$1@lnx107.hrz.tu-darmstadt.de...
> Falk Salewski <salewski@informatik.rwth-aachen.de> wrote: > : Hello everybody, > > : I want to connect a Xilinx CoolrunnerII (XC2c256) to the CAN-Bus. To > make > : it easy I would like to use a ready to use CAN-bus driver chip (as much > of > : the > : protocol implemented as possible). Any suggestions? How many of the CPLD > : resources does it take to initialize/communicate with the CAN-bus driver > : chip? > > There is a CAN Protocoll Controller at www.opencores.org > > Bye > -- > Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de > > Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt > --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Falk Salewski wrote:
> Thank you very much for your reply. > > However what I am looking for is how difficult is it to connect a CPLD to a > CAN-controller chip like the SJA1000 > http://www-eu3.semiconductors.com/pip/SJA1000.html > and how many of the CPLD resources it takes to initialize/communicate with > this CAN-controller.
You'll need to setup the registers [either a rom in the CPLD, or a Serial EE holding the init values, to BUS], and then be able to poll messages, and manage TX packets (which come from where ?). All of these are not CPLD-centric tasks, so why not use a small uC instead - or even better, choose a uC with CAN on chip ? If you have the XC2C256 there already, needing > 128 MC for other tasks, then you could use a small portion, for SPI-SJA1000 bridge, and then use a small SPI uC for the CAN manager/init. Philips LPC9xx or Silicon Labs C8051F33x series would do this, in tiny 11-20pin packages. -jg
Falk Salewski <salewski@informatik.rwth-aachen.de> wrote:
: Thank you very much for your reply.

: However what I am looking for is how difficult is it to connect a CPLD to a 
: CAN-controller chip like the SJA1000 
: http://www-eu3.semiconductors.com/pip/SJA1000.html
: and how many of the CPLD  resources  it takes to initialize/communicate
: with this CAN-controller.

: bye
: Falk

: "Uwe Bonnes" <bon@elektron.ikp.physik.tu-darmstadt.de> schrieb im 
: Newsbeitrag news:coensd$mh6$1@lnx107.hrz.tu-darmstadt.de...
: > Falk Salewski <salewski@informatik.rwth-aachen.de> wrote:
...

Can communication needs some protocoll stack. Your question seems to be what
implementing this stack in hardware needs with regards to hardware
resources.

My guess is that the 2c256 is too small for that task. 

Bye
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Jim Granville <no.spam@designtools.co.nz> wrote:

:   All of these are not CPLD-centric tasks, so why not use a small uC 
: instead  - or even better, choose a uC with CAN on chip ?
:   If you have the XC2C256 there already, needing > 128 MC for other 
: tasks, then you could use a small portion, for SPI-SJA1000 bridge, and 
: then use a small SPI uC for the CAN manager/init.
:   Philips LPC9xx or Silicon Labs C8051F33x series would do this, in tiny 
: 11-20pin packages.

Perhaps PicoBlaze  for CoolRunner-II could be used too...

Bye

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Thanks for the reply!

I realized four 8bit counters in the CPLD and just want to send this 
information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am not 
thinking wether this is the optimal solution but if it is possible without 
an aditional uC (Project at university)
I will have a look if I can store enough information in the CPLD for the 
initialization of the SJA1000 chip...

FalkS.

"Jim Granville" <no.spam@designtools.co.nz> schrieb im Newsbeitrag 
news:mBCqd.13010$3U4.254093@news02.tsnz.net...
> Falk Salewski wrote: >> Thank you very much for your reply. >> >> However what I am looking for is how difficult is it to connect a CPLD to >> a CAN-controller chip like the SJA1000 >> http://www-eu3.semiconductors.com/pip/SJA1000.html >> and how many of the CPLD resources it takes to initialize/communicate >> with this CAN-controller. > > You'll need to setup the registers [either a rom in the CPLD, or > a Serial EE holding the init values, to BUS], and then be able to poll > messages, and manage TX packets (which come from where ?). > > All of these are not CPLD-centric tasks, so why not use a small uC > instead - or even better, choose a uC with CAN on chip ? > If you have the XC2C256 there already, needing > 128 MC for other tasks, > then you could use a small portion, for SPI-SJA1000 bridge, and then use a > small SPI uC for the CAN manager/init. > Philips LPC9xx or Silicon Labs C8051F33x series would do this, in tiny > 11-20pin packages. > -jg > >
"Uwe Bonnes" <bon@elektron.ikp.physik.tu-darmstadt.de> schrieb im 
Newsbeitrag news:coest7$o8j$1@lnx107.hrz.tu-darmstadt.de...
> Falk Salewski <salewski@informatik.rwth-aachen.de> wrote: > : Thank you very much for your reply. > > : However what I am looking for is how difficult is it to connect a CPLD > to a > : CAN-controller chip like the SJA1000 > : http://www-eu3.semiconductors.com/pip/SJA1000.html > : and how many of the CPLD resources it takes to initialize/communicate > : with this CAN-controller. > > : bye > : Falk > > : "Uwe Bonnes" <bon@elektron.ikp.physik.tu-darmstadt.de> schrieb im > : Newsbeitrag news:coensd$mh6$1@lnx107.hrz.tu-darmstadt.de... > : > Falk Salewski <salewski@informatik.rwth-aachen.de> wrote: > ... > > Can communication needs some protocoll stack. Your question seems to be > what > implementing this stack in hardware needs with regards to hardware > resources. > > My guess is that the 2c256 is too small for that task. > > Bye > -- > Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de > > Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt > --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
I thought the protocoll stack is already implemented in the SJA1000 and I just have to write to some kind of send buffer and read from a receive buffer... Falk
"Falk Salewski" <salewski@informatik.rwth-aachen.de> wrote in message
news:310ihvF31ii5hU1@uni-berlin.de...
> Thanks for the reply! > > I realized four 8bit counters in the CPLD and just want to send this > information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am
not
> thinking wether this is the optimal solution but if it is possible without > an aditional uC (Project at university) > I will have a look if I can store enough information in the CPLD for the > initialization of the SJA1000 chip...
http://ww1.microchip.com/downloads/en/DeviceDoc/21801b.pdf Quiz: How many macrocells is needed to initialize MMC card (nonSPI mode) and configure and FPGA from bitstream file on the card? Answer: 20 PLD macrocells! http://www.openchip.org/bootx/xmsmmc.html 256 PLD cells can be alot. depends how they are used :) but I would not go with SJA1000+PLD (unless restricted to those component by definition) waste of time and human resources Antti
Hi Antti,

Antti Lukats wrote:

>"Falk Salewski" <salewski@informatik.rwth-aachen.de> wrote in message >news:310ihvF31ii5hU1@uni-berlin.de... > > >>Thanks for the reply! >> >>I realized four 8bit counters in the CPLD and just want to send this >>information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am >> >> >not > > >>thinking wether this is the optimal solution but if it is possible without >>an aditional uC (Project at university) >>I will have a look if I can store enough information in the CPLD for the >>initialization of the SJA1000 chip... >> >> > >http://ww1.microchip.com/downloads/en/DeviceDoc/21801b.pdf > >Quiz: How many macrocells is needed to initialize MMC card (nonSPI mode) and >configure and FPGA from bitstream file on the card? > >Answer: 20 PLD macrocells! > >http://www.openchip.org/bootx/xmsmmc.html > >
No file system support (I assume) and no partition support. How do you write the bitstream as row data ? cheers, Aurash
>256 PLD cells can be alot. depends how they are used :) > >but I would not go with SJA1000+PLD (unless restricted to those component by >definition) waste of time and human resources > >Antti > > > >
-- __ /