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Xilinx

Started by Roberto Gallo September 17, 2003
    Hello everyone,

    What is the cheapest line of volatile Xilinx�s FPGAs?
    What is the relation between Altera�s LEs and Xilinx�s Slices?
    I need the cheapest Xilinx FPGA (or from any other manufacturer) that
has the aproximated same capacity as a 700-1000 Altera�s LEs. What would you
suggest?

    Thank you very much,
    Roberto.


Roberto Gallo wrote:
> > Hello everyone, > > What is the cheapest line of volatile Xilinx�s FPGAs? > What is the relation between Altera�s LEs and Xilinx�s Slices? > I need the cheapest Xilinx FPGA (or from any other manufacturer) that > has the aproximated same capacity as a 700-1000 Altera�s LEs. What would you > suggest? > > Thank you very much, > Roberto.
If you won't be in production until next year, the cheapest solution will likely be the Spartan 3. If you need parts now, it would likely be the Spartan IIE. Both families have about 1500 logic cells in the smallest part, regardless of what the data sheets says. Xilinx likes to pad the number since they feel they have "uber-cells" which count as more than 1 each. But then again, they don't define the term "logic cell", so I guess they can count them any way they want. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
What Altera calls an LE, Xilinx calls a Logic Cell (yes, I know there is
a slight marketing inflation), and two Altera LEs correspond to one
Xilinx slice.
So you are looking for the XC2S30 (the next-to-smallest member) with the
equivalent of 864 LEs ( or the 2S50 with 1536 LE equivalents).
Your best bet for low price is the Spartan3 XC3S50 with 1536 LE
equivalents. This chip is available in an early version without BlockRAM.

Peter Alfke, Xilinx Applications
=========================
Roberto Gallo wrote:
> > Hello everyone, > > What is the cheapest line of volatile Xilinx�s FPGAs? > What is the relation between Altera�s LEs and Xilinx�s Slices? > I need the cheapest Xilinx FPGA (or from any other manufacturer) that > has the aproximated same capacity as a 700-1000 Altera�s LEs. What would you > suggest? > > Thank you very much, > Roberto.
rickman wrote:
> Xilinx likes to > pad the number since they feel they have "uber-cells" which count as > more than 1 each. But then again, they don't define the term "logic > cell", so I guess they can count them any way they want.
Not really, the "padding" is exactly 12.5%, so it has been defined and is deterministic. Marketing wants to get credit for the additional multiplexers that the competition does not have. If you are a purist, just count slices and devide by 2, or multiply CLBs by 4 (Virtex and Spartan2) or by 8 (Virtex2 and Spartan3). That gets you the number of LUTs+flip-flops. Peter Alfke
>
In article <3F688290.86C3AAC4@xilinx.com>, Peter Alfke wrote:
> So you are looking for the XC2S30 (the next-to-smallest member) with the > equivalent of 864 LEs ( or the 2S50 with 1536 LE equivalents). > Your best bet for low price is the Spartan3 XC3S50 with 1536 LE > equivalents. This chip is available in an early version without BlockRAM.
The XC2S50E-6PQ208C is in-stock at Digi-Key for $14.55 quantity 1. The cheapest theoretical price I have seen for the XC3S50J is $23.85 (for a -4TQ144CES), and I have yet to see a distributor claim stock. I know which one I would choose. - Larry
Well, newness has its price. 
But a year from now, the XC3S50 will be the low-cost champion,
especially in high volume...
But there is nothing wrong with using Spartan2, except for the smaller
BRAM and the simpler clock manager, compared to the upcoming production Spartan3-50....
Peter Alfke
===========================
Larry Doolittle wrote:
> > The XC2S50E-6PQ208C is in-stock at Digi-Key for $14.55 quantity 1. > The cheapest theoretical price I have seen for the XC3S50J is $23.85 > (for a -4TQ144CES), and I have yet to see a distributor claim stock. > > I know which one I would choose. > > - Larry
True, but those muxes are virtually useless for data path because the bit
pitch doesn't match the bit pitch of the arithmetic.  Count 4-LUTs or
flip-flops instead.

Peter Alfke wrote:

> rickman wrote: > > Xilinx likes to > > pad the number since they feel they have "uber-cells" which count as > > more than 1 each. But then again, they don't define the term "logic > > cell", so I guess they can count them any way they want. > > Not really, the "padding" is exactly 12.5%, so it has been defined and > is deterministic. > Marketing wants to get credit for the additional multiplexers that the > competition does not have. > If you are a purist, just count slices and devide by 2, or multiply CLBs > by 4 (Virtex and Spartan2) or by 8 (Virtex2 and Spartan3). That gets you > the number of LUTs+flip-flops. > > Peter Alfke > >
-- --Ray Andraka, P.E. President, the Andraka Consulting Group, Inc. 401/884-7930 Fax 401/884-7950 email ray@andraka.com http://www.andraka.com "They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759
So, the 12.5% stand for "virtually useless" multiplexers, useful RAM
capability, and the super-useful SRL16 shift-register capability that
enhances Ray's formidable talents even more.  :-)

Peter Alfke
==================================
Ray Andraka wrote:
> > True, but those muxes are virtually useless for data path because the bit > pitch doesn't match the bit pitch of the arithmetic. Count 4-LUTs or > flip-flops instead. > > P
Ray Andraka wrote:
> > True, but those muxes are virtually useless for data path because the bit > pitch doesn't match the bit pitch of the arithmetic. Count 4-LUTs or > flip-flops instead. > > Peter Alfke wrote: > > > rickman wrote: > > > Xilinx likes to > > > pad the number since they feel they have "uber-cells" which count as > > > more than 1 each. But then again, they don't define the term "logic > > > cell", so I guess they can count them any way they want. > > > > Not really, the "padding" is exactly 12.5%, so it has been defined and > > is deterministic. > > Marketing wants to get credit for the additional multiplexers that the > > competition does not have. > > If you are a purist, just count slices and devide by 2, or multiply CLBs > > by 4 (Virtex and Spartan2) or by 8 (Virtex2 and Spartan3). That gets you > > the number of LUTs+flip-flops. > > > > Peter Alfke > > >
Personally, I find marketing to frequently be irritating and annoying. When I try to get technical information from a data sheet or web site and marketing distorts or glamorizes the information so much that it interferes with my work, I find that both an insult to my intelligence and a waste of my time. I am aware of why Xilinx marketing distorts the cell counts and I don't really care by how much. I care about the fact that I have to ignore a column of data in a data sheet as marketing hype and use a calculator to get the *real* numbers. Clearly the marketing people don't think we can add and multiply ourselves. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
Rick, I will not defend the +12,5%, but I can explain it:

It is the price we all pay for the intense and sometimes ruthless
competition in this market. Without a bloodthirsty competitor "in our
rear-view mirror", we would be gentlemanlike and give you conservative
numbers. But the way it is, our marketing folks think it would throw
away some really (really!) powerful features if they are not somehow
represented in the numbers. Each Xilinx Logic Cell does more than an
Altera LE, there can be no doubt about that.

This is not an excuse (personally I agree with you), but an explanation.

Peter Alfke
==========================

rickman wrote:
 I care about the fact that I have to ignore a
> column of data in a data sheet as marketing hype and use a calculator to > get the *real* numbers. Clearly the marketing people don't think we can > add and multiply ourselves. >