This post may seem a bit awkward, but has anyone ever come across a VHDL or Verilog implementation of an FPGA? It would be very instructional to have a look at it. IMHO, it should be at any rate possible to implement a small FPGA as a bit file sitting on top of another FPGA. Our group is currently working on some ideas for minimizing the reconfiguration data in dynamically reconfigurable FPGA applications. It would be very kind if anyone could point me to any resources... Thank you so much in advance... Sebastian
FPGA implementation in (V)HDL
Started by ●September 22, 2003
Reply by ●September 22, 20032003-09-22
On 22 Sep 2003 06:26:07 -0700, Sebastian_Lange@gmx.de (Sebastian Lange) wrote:>This post may seem a bit awkward, but has anyone ever come across a >VHDL or >Verilog implementation of an FPGA? It would be very instructional to >have a >look at it. IMHO, it should be at any rate possible to implement a >small FPGA as a bit file sitting on top of another FPGA. Our group is >currently working on some ideas for minimizing the reconfiguration >data in dynamically reconfigurable FPGA applications. >It would be very kind if anyone could point me to any resources... >Thank you so much in advance... > >SebastianEric Crabill's course at SJSU covers this as Lab 5 http://www.engr.sjsu.edu/crabill/ Philip Freidin Fliptronics
Reply by ●September 22, 20032003-09-22
Also take a look at: http://www.opencores.org/projects/fpga/ Regrads, Andras Tantos "Philip Freidin" <philip@fliptronics.com> wrote in message news:ksutmv8keob45q149tk04kb040lu6l8bl5@4ax.com...> On 22 Sep 2003 06:26:07 -0700, Sebastian_Lange@gmx.de (Sebastian Lange)wrote:> >This post may seem a bit awkward, but has anyone ever come across a > >VHDL or > >Verilog implementation of an FPGA? It would be very instructional to > >have a > >look at it. IMHO, it should be at any rate possible to implement a > >small FPGA as a bit file sitting on top of another FPGA. Our group is > >currently working on some ideas for minimizing the reconfiguration > >data in dynamically reconfigurable FPGA applications. > >It would be very kind if anyone could point me to any resources... > >Thank you so much in advance... > > > >Sebastian > > Eric Crabill's course at SJSU covers this as Lab 5 > > http://www.engr.sjsu.edu/crabill/ > > > > > > Philip Freidin > Fliptronics
Reply by ●September 22, 20032003-09-22
> a VHDL or Verilog implementation of an FPGA?I know that somebody started one about 2 years ago, but I can't find the bookmark anymore. The main problem was that the custom FPGA needs a custom toolchain, and that makes it a really huge project. Marc
Reply by ●September 23, 20032003-09-23
On 22 Sep 2003 12:15:59 -0700, jetmarc@hotmail.com (jetmarc) wrote:>> a VHDL or Verilog implementation of an FPGA? > >I know that somebody started one about 2 years ago, but I can't find >the bookmark anymore. The main problem was that the custom FPGA >needs a custom toolchain, and that makes it a really huge project. > >MarcThe logical thing to do would be to combine this with the previous thread, implement a XC6216 on top of a Virtex-II, use the XC6200 tools that still exist, and satisfy those folks who can no longer get the XC6200 for research purposes... - Brian
Reply by ●September 23, 20032003-09-23
jetmarc@hotmail.com (jetmarc) writes:> > a VHDL or Verilog implementation of an FPGA? > > I know that somebody started one about 2 years ago, but I can't find > the bookmark anymore. The main problem was that the custom FPGA > needs a custom toolchain, and that makes it a really huge project.That would have been the: MPGA - Meta Programmable Gate Array http://ce.et.tudelft.nl/~reinoud/mpga/README.html -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Programmer, Archer, Blacksmith - hardware runs the world, software controls the hardware code generates the software, have you coded today?
Reply by ●September 23, 20032003-09-23
Reply by ●September 23, 20032003-09-23
> The logical thing to do would be to combine this with the previous > thread, implement a XC6216 on top of a Virtex-II, use the XC6200 tools > that still exist, and satisfy those folks who can no longer get the > XC6200 for research purposes...Heh, someone should implement an Altera architecture on a Virtex :_D (not poking fun at the idea of a meta FPGA, of course) Regards, Vinh Pham
Reply by ●September 23, 20032003-09-23
Brian Drummond wrote:> On 22 Sep 2003 12:15:59 -0700, jetmarc@hotmail.com (jetmarc) wrote: > > >>>a VHDL or Verilog implementation of an FPGA? >> >>I know that somebody started one about 2 years ago, but I can't find >>the bookmark anymore. The main problem was that the custom FPGA >>needs a custom toolchain, and that makes it a really huge project. >> >>Marc > > > The logical thing to do would be to combine this with the previous > thread, implement a XC6216 on top of a Virtex-II, use the XC6200 tools > that still exist, and satisfy those folks who can no longer get the > XC6200 for research purposes...That's a great idea... John
Reply by ●September 24, 20032003-09-24
Peter Alfke <peter@xilinx.com> wrote in message news:<3F70E4F9.2A7A642D@xilinx.com>...> No comment... > Peter AlfkeHi Peter, this is something, I mean if someone (like you) doesnt hold it back to say 'no comments' it means something, need to figure out what :) FYI MPGA Meta Gate array pure Xilinx SRL16 oriented design, 1 MPGA cell = 1 Virtex slice bitstream is prepared as ASCII chart that can be directly downloaded! yes you have ASCII chart you edit it and download to FPGA KRPAN (OC embedded FPGA) this is very similar to Algotronix CAL1024 with little bit enhanced interconnect and cell architecture 1 KRPAN cell is approx 26 Virtex slices KRPAN comes with verilog to bitstream tool that does map place and route (simulated annealing), it also has some Floorplanner, software is written 100% in Java and does work. both the cell sized indicated for fpga-fpga include bitstream programmin interface. antti@openchip.org I wonder if your comment is still no comment? guess it is. me smiling here :)
