"newman5382" <newman5382@yahoo.com> schrieb im Newsbeitrag news:oShOd.51114$JF2.33907@tornado.tampabay.rr.com...>> I guess I might have to open a web case, wait for EDK6.3i to arrive, buy > Chipscope or borrow a scope, or apply a blow torch to the Memec SysAce > card:,) Usually Memec has pretty good reference designs, but this one did > not have an MPU interface one for the standalone sysace module. Of course > their baseline reference had a bunch of deprecated cores I ended up > converting to EDK6.2 sp3. Do you think sysace is going away to bereplaced> by the platform flash stuff? I'm wondering if I should be researching a > more valuable target. > > -Thanks again, > > -NewmanQ: What Memec Board are you using? Q: You can use ChipScope Eval version, but well that may or may not help, try bugging memec-xilinx too A: Hm, my personal view is that SystemACE should be considered not recommended for new designs. The SystemACE MP is already discontinued SystemACE SC is availabe but hey that only a Virtex-V50 bitstream + docu! The SystemACE chip - HUUGE space requirments on PCB, etc. I have a project pushed onto my project stack: universal configuration controller - support all type of FPGA mixed chains multiply chains different removable media, etc.. the MMC card FPGA configuration IP core was developed to be used in the "universal config controller". It takes only 21 PLD macrocells to boot Xilinx FPGA in Master serial mode from MMC card (approx 55 cells for SD card). Antti
V4LX25-ES and systemACE
Started by ●February 8, 2005
Reply by ●February 9, 20052005-02-09
Reply by ●February 9, 20052005-02-09
"Antti Lukats" <antti@openchip.org> wrote in message news:cucgqp$rbo$00$1@news.t-online.com...> "newman5382" <newman5382@yahoo.com> schrieb im Newsbeitrag > news:oShOd.51114$JF2.33907@tornado.tampabay.rr.com... >> > >> I guess I might have to open a web case, wait for EDK6.3i to arrive, buy >> Chipscope or borrow a scope, or apply a blow torch to the Memec SysAce >> card:,) Usually Memec has pretty good reference designs, but this one >> did >> not have an MPU interface one for the standalone sysace module. Of >> course >> their baseline reference had a bunch of deprecated cores I ended up >> converting to EDK6.2 sp3. Do you think sysace is going away to be > replaced >> by the platform flash stuff? I'm wondering if I should be researching a >> more valuable target. >> >> -Thanks again, >> >> -Newman > > Q: What Memec Board are you using?I'm using a DS-BD-2VPxLC Revision 1 UltraController V2Pro System Ace Module DS-BD-SAM Rev 1 By the way, the separate interface connector they tell you to buy from another company is inadequate. The loose fit of the pins makes for intermittant contact. I ended up nibbling the ultracontroller connector housing away to make a direct connection with the ACE board.> Q: You can use ChipScope Eval version, but well that may or may not help, > try bugging memec-xilinx tooI tried the ChipScope eval version, and burnt through the eval period. I'm thinking that I should buy one, I'm just waiting for a pressing need to get one, cause that starts the clock ticking on the time license period? It was never clear to me if Chipscope was a timebased license, or whether you got updates for a year to the different ISE versions, or whether you have to purchase a new license for every ISE update. On another note, I tried changing the IO power straps to 2.5 volts with 2.5 LVCMOS I/O with a similar change to the SysAce board. It appears that I can no longer achieve an MPU lock, perhaps a write problem. I was thinking of simulating the design now that all the code is contained in BRAM, but since I don't have a model of the XCCACE chip, and maybe its some type of interface compatibility level thing, I'm not sure it would be worth it. Thanks for your consideration, -Newman> > A: Hm, my personal view is that SystemACE should be considered not > recommended for new designs. The SystemACE MP is already discontinued > SystemACE SC is availabe but hey that only a Virtex-V50 bitstream + docu! > The SystemACE chip - HUUGE space requirments on PCB, etc. > > I have a project pushed onto my project stack: universal configuration > controller - support all type of FPGA mixed chains multiply chains > different > removable media, etc.. the MMC card FPGA configuration IP core was > developed > to be used in the "universal config controller". It takes only 21 PLD > macrocells to boot Xilinx FPGA in Master serial mode from MMC card (approx > 55 cells for SD card). > > Antti > > > > > > > > > > >
Reply by ●February 10, 20052005-02-10
> > Antti, > Thanks for the reply. > > This information applies to a V2Pro UltraController product and not to a > V4. > > I make a special test case where I stripped pretty much everything in the > deisng except the opb_sysace, and some gpio to toggle some led's and some > uart support for stdout. > > I got some code to fit entirely within the brams and loaded it into the > compact flash without any elf file stuff. When I boot via the CF, the > status led goes green with no lit error led. After it returns from the > XSysAce_IdentifyCF routine, the Signature field is 848A which appears > correct, but the NumCylinders is also 848A. > > The registers before rouitne is called are > cf dword 0 = 00000001 > cf dword 1 = 00150392 > cf dword 2 = 00000000 > cf dword 3 = 00000CED > cf dword 4 = 00000000 > cf dword 5 = 100C0200 > cf dword 6 = 00000802 > cf dword 7 = 000000B3 > The registers after XSysAce_IdentifyCF called > cf dword 0 = 00000001 > cf dword 1 = 003502B2 > cf dword 2 = 00000000 > cf dword 3 = 00000CED > cf dword 4 = 00000000 > cf dword 5 = 100C0200 > cf dword 6 = 00000802 > cf dword 7 = 000000B3 > > It looks like the reads of the buffer are not incrementing the FIFO that > would cause the IdentifyMemCard command to end. What bothers me is that > I appear to be able to read the other registers OK. > > I guess I might have to open a web case, wait for EDK6.3i to arrive, buy > Chipscope or borrow a scope, or apply a blow torch to the Memec SysAce > card:,) Usually Memec has pretty good reference designs, but this one did > not have an MPU interface one for the standalone sysace module. Of course > their baseline reference had a bunch of deprecated cores I ended up > converting to EDK6.2 sp3. Do you think sysace is going away to be > replaced by the platform flash stuff? I'm wondering if I should be > researching a more valuable target. > > -Thanks again, > > -NewmanJust to achieve closure on this part of the thread, I found that OEN from the FPGA to the SysAce board was specified to the wrong location in the UCF. Arrgh. -Newman
Reply by ●February 10, 20052005-02-10
"newman5382" <newman5382@yahoo.com> schrieb im Newsbeitrag news:68IOd.10408$pc5.2593@tornado.tampabay.rr.com...> > > > > Antti, > > Thanks for the reply.[snip]> > -Thanks again, > > > > -Newman > > Just to achieve closure on this part of the thread, I found that OEN from > the FPGA to the SysAce board was specified to the wrong location in theUCF.> Arrgh. > > -NewmanAhh! Good for you! With the V4LX25-ES the SystemACE doesnt seem to work! Be the reason whatever, at most 10 succesfully secotor reads with correct contents there comes an error that lock ups further communication with systemace So you are lucky I am not... I wonder that no-one from Xilinx has bothered to comment the issue SystemACE is working on ML401 and there is also LX25 on board so if there is an issue then Xilinx DOES know, or if there isnt a issue then I would be thankful if someone could confirm that systemace works ok with V4LX25-ES without using any special tricks. Antti
Reply by ●February 11, 20052005-02-11
Antti Lukats wrote:> > Ahh! Good for you! > > With the V4LX25-ES the SystemACE doesnt seem to work! > Be the reason whatever, at most 10 succesfully secotor reads > with correct contents there comes an error that lock ups further > communication with systemace > So you are lucky I am not... > > I wonder that no-one from Xilinx has bothered to comment the issue > SystemACE is working on ML401 and there is also LX25 on board > so if there is an issue then Xilinx DOES know, or if there isnt a issue > then I would be thankful if someone could confirm that systemace > works ok with V4LX25-ES without using any special tricks. > > AnttiAntti, make sure there is no pull up resistor on TDO, and add a capacitor between TDO and ground - about 220 pf. See if that will solve your problem ! Regards, rudi ============================================================= Rudolf Usselmann, ASICS World Services, http://www.asics.ws Your Partner for IP Cores, Design, Verification and Synthesis
Reply by ●February 11, 20052005-02-11
"Rudolf Usselmann" <russelmann@hotmail.com> schrieb im Newsbeitrag news:cuhsl4$ed3$1@nobel.pacific.net.sg...> Antti Lukats wrote: > > > > Ahh! Good for you! > > > > With the V4LX25-ES the SystemACE doesnt seem to work! > > Be the reason whatever, at most 10 succesfully secotor reads > > with correct contents there comes an error that lock ups further > > communication with systemace > > So you are lucky I am not... > > > > I wonder that no-one from Xilinx has bothered to comment the issue > > SystemACE is working on ML401 and there is also LX25 on board > > so if there is an issue then Xilinx DOES know, or if there isnt a issue > > then I would be thankful if someone could confirm that systemace > > works ok with V4LX25-ES without using any special tricks. > > > > Antti > > Antti, > > make sure there is no pull up resistor on TDO, and add a > capacitor between TDO and ground - about 220 pf. See if > that will solve your problem ! > > Regards, > rudiThanks Rudi, but the TDO pullup isnt directly the problem, the SystemACE does read a random number (less than 10) sectors correctly with correct contents after that it gets error and stuck - the sector reads use MPU pins and the JTAG is not involved at all. But... I had pretty much always problems with systemace mpu interface in all cases where FPGA was not configured by the systemace, so if I desolder that pullup and let the sysace todo the config maybe that solves the problem - I kind dont like to modify PCB boards that use 0201 sized components so I have not yet worked with the soldering iron on the Memec V4 board Antti
Reply by ●February 15, 20052005-02-15
Antti, if I read your message correctly you have two seperate problems: 1. You cannot configure the FPGA using an ACE file. 2. You cannot access the DOS partition on your CF card to load image.bin The first problem might be caused by the TDO tristate errata on some LX25 -ES samples. Whether you do or do not see the problem depends on many factors one of them the order of the devices in the JTAG chain. What devices and in what order are your devices in the JTAG chain? Is the ACE file generated with the correct parameters, i.e. how do you generate your ACE file? If you look at (intermediary) SVF files you will see that they consist of a data shifted out on TDI and bits shifted in on TDO. The bits shifted in on TDO are then compared against a mask. If the mask and the TDO bits do not match System ACE CF will stop and generate an error. As a quick test you can remove the TDO part from the SVF file and use impact to generate an ACE file. With that you disable the error checking, i.e. you blindly shift the data into the FPGA. I'm not sure what causes your second problem. - Peter Antti Lukats wrote:> Hi > > has any one some hints or tips how to get an Virtex4 LX25-ES configured from > SystemACE? > we can configure from iMpact and if we load the uclinux kernel from XMD it > works too. > but now when I try to load the uclinux image from CompactFlash then there > are problems > if the FPGA is configured by impact then there will always be random sector > read errors > when attempting to load the image.bin from CompactFlash. On ML300 I had to > load from > CF in order to access the CF, but with V4LX the FPGA config from > CompactFlash doesnt > seem to work, the status led blinks once and then the error led goes on. I > assume it is the TDO > tristate problem with -ES samples, but... > > ML401 has systemACE as well and that works! So whats the trick ?? > > Antti > >
