Hi Creative lazyness and sometimes simple waiting (or sleeping) is possible the most effective way to work! Ok, only sometimes: I did write FPGA bootloader for MMC Card (in MMC not SPI mode), I was about to write the SD Card version also, but that wasnt challenging at that time and I had no real urgent need. Some time ago I uploaded my IP Core to opencores, and now, guess what I dont have to work on the SD Card FPGA configuration core as it done already, possible at the time while I was a sleep. 39 hours ago a spiboot project was added to opencores, supporting FPGA config from both MMC or SD cards in SPI mode. My MMC card was 21 PLD macrocells, my estimate for MMC-SD card core was 50..55 PLD cells (in non SPI mode) and I was sure the MMC-SD card combined core in SPI mode would fit 36 Macrocells, - the spiboot from opencores (MMC+SD in SPI) - my synthesis gives 24 PLD cells so it defenetly fits XC9536 :) - please note that I have not verified the opencores spiboot with any hardware, it may not be working out of box, as it is the first release. (I know my core does work, it sits on SystemACE slot on VP20 and does work) Antti has a smile on the face today
Writing IP-Cores while sleeping ;)
Started by ●February 10, 2005
Reply by ●February 10, 20052005-02-10
hum, do you meen that you can use an MMC card connected to a CPLD to configure a FPGA? Is the MMC card formatted to any file system? What is the procedure? You copy the config file with a normal card read connected to your computer then connect this card to your app and that's it? "Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag news:cufkhe$mt7$03$1@news.t-online.com...> Hi > > Creative lazyness and sometimes simple waiting (or sleeping) is possible > the > most effective way to work! > Ok, only sometimes: > > I did write FPGA bootloader for MMC Card (in MMC not SPI mode), I was > about > to write the SD Card version also, but that wasnt challenging at that time > and I had no real urgent need. Some time ago I uploaded my IP Core to > opencores, and now, guess what I dont have to work on the SD Card FPGA > configuration core as it done already, possible at the time while I was a > sleep. 39 hours ago a spiboot project was added to opencores, supporting > FPGA config from both MMC or SD cards in SPI mode. > > My MMC card was 21 PLD macrocells, my estimate for MMC-SD card core was > 50..55 PLD cells (in non SPI mode) and I was sure the MMC-SD card combined > core in SPI mode would fit 36 Macrocells, - the spiboot from opencores > (MMC+SD in SPI) - my synthesis gives 24 PLD cells so it defenetly fits > XC9536 :) - please note that I have not verified the opencores spiboot > with > any hardware, it may not be working out of box, as it is the first > release. > (I know my core does work, it sits on SystemACE slot on VP20 and does > work) > > Antti has a smile on the face today > >
Reply by ●February 10, 20052005-02-10
"Mouarf" <mouarf@chezmoi.fr> schrieb im Newsbeitrag news:420b57fd$0$8202$636a15ce@news.free.fr...> hum, do you meen that you can use an MMC card connected to a CPLD to > configure a FPGA? > Is the MMC card formatted to any file system? > What is the procedure? You copy the config file with a normal card read > connected to your computer then connect this card to your app and that'sit? yes! basically there are 2 options 1) you reformat the mmc-sd card with reserved sectors and copy the bitstream there 2) you can also just copy normal xilinx bitstream as generated by xilinx tools as first file to formatted mmc card this will also work, you overwrite the file later its ok too, as long as the bitstream file is located in sequential sectors. the above applies for xilinx, for altera it maybe require todo bitswap additionally a similar IP core is offered commercially by El Camino, they provide a windows utility also. (their price is 1900 EUR for source code license) Antti
Reply by ●February 10, 20052005-02-10
"Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag news:cufldf$rj5$01$1@news.t-online.com...> 2) you can also just copy normal xilinx bitstream as generated by xilinx > tools as first file to formatted mmc card this will also work, you > overwrite > the file later its ok too, as long as the bitstream file is located in > sequential sectors. >
Reply by ●February 10, 20052005-02-10
"Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag news:cufldf$rj5$01$1@news.t-online.com...> 2) you can also just copy normal xilinx bitstream as generated by xilinx > tools as first file to formatted mmc card this will also work, you > overwrite > the file later its ok too, as long as the bitstream file is located in > sequential sectors. >I did not checked into the code but how do you recognize the correct bitstream file in the card with the second method? To you look for the first time you meet a special set of bytes?
Reply by ●February 10, 20052005-02-10
"Mouarf" <mouarf@chezmoi.fr> schrieb im Newsbeitrag news:420b5ae8$0$8186$636a15ce@news.free.fr...> > "Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag > news:cufldf$rj5$01$1@news.t-online.com... > > > 2) you can also just copy normal xilinx bitstream as generated by xilinx > > tools as first file to formatted mmc card this will also work, you > > overwrite > > the file later its ok too, as long as the bitstream file is located in > > sequential sectors. > > > > > I did not checked into the code but how do you recognize the correct > bitstream file in the card with the second method? To you look for thefirst> time you meet a special set of bytes?For xilinx FPGAs it isnt necessary :) just dump all the mmc card from sector 0! FPGA will sync itself when the bitstream begins :) That is tested with my bootx core, my IP core also includes minimal emulation ip core that emulates the FPGA configuration internals (not complete) so I tested with MMC card connected to FPGA and did configure my "config emulator" later test where done with real XC9536 connected to VP20 Antti
Reply by ●February 10, 20052005-02-10
"Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag news:cufm2s$sn6$01$1@news.t-online.com...> "Mouarf" <mouarf@chezmoi.fr> schrieb im Newsbeitrag > news:420b5ae8$0$8186$636a15ce@news.free.fr...> For xilinx FPGAs it isnt necessary :) just dump all the mmc card from > sector > 0! > FPGA will sync itself when the bitstream begins :) >with a card reader, are you sure that the first file will be at sector 0 in a just formatted MMC?
Reply by ●February 10, 20052005-02-10
"Mouarf" <mouarf@chezmoi.fr> schrieb im Newsbeitrag news:420b5d65$0$8212$636a15ce@news.free.fr...> > "Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag > news:cufm2s$sn6$01$1@news.t-online.com... > > "Mouarf" <mouarf@chezmoi.fr> schrieb im Newsbeitrag > > news:420b5ae8$0$8186$636a15ce@news.free.fr... > > > For xilinx FPGAs it isnt necessary :) just dump all the mmc card from > > sector > > 0! > > FPGA will sync itself when the bitstream begins :) > > > > with a card reader, are you sure that the first file will be at sector 0in> a just formatted MMC? >No, it want be, but that doesnt matter :) the all content before the actual bitstream is dumped to FPGA as well it is discarded by FPGA config logic, as it is looking for sync word Antti
Reply by ●February 10, 20052005-02-10
"Antti Lukats" <antti@openchip.org> schrieb im Newsbeitrag news:cufmna$rnu$03$1@news.t-online.com...> No, it want be, but that doesnt matter :) > the all content before the actual bitstream is dumped to FPGA as well > it is discarded by FPGA config logic, as it is looking for sync wordok, I understand now, nice behaviour from the FPGA!
Reply by ●February 10, 20052005-02-10
>> > For xilinx FPGAs it isnt necessary :) just dump all the mmc card from >> > sector >> > 0! >> > FPGA will sync itself when the bitstream begins :) >> > >> >> with a card reader, are you sure that the first file will be at sector 0 > in >> a just formatted MMC? >> > No, it want be, but that doesnt matter :) > the all content before the actual bitstream is dumped to FPGA as well > it is discarded by FPGA config logic, as it is looking for sync word >Sounds good. But these SD cards aren't they built with NAND Flash? And NAND Flash can have bad sectors. If one of these bad sectors is one of the first you can't use it. There was a similar idea some time ago to configure the FPGA from a NAND flash. With pointers from one sector to the next good sector. However, this design will take some more resources in an CPLD - not worth the effort. Martin ---------------------------------------------- JOP - a Java Processor core for FPGAs: http://www.jopdesign.com/
