Reconfigure your dreams: fully reconfigurable computer in DIP40 !

Hi

finally I can announce it:

http://www.eubus.net/hydraXC

Reconfigurable "dream" - small and fully reconfigurable computing module.

Designed to be as reconfigurable as possible, eg all of its
intelligence is loaded at the boot time. The smart system
management controller allows safe update of the OS image as
well as the FPGA bitstream over any supported communication
channel (LAN or serial or other). Of course the new hardware
and OS can simply be copied to the removable media (miniSD)
card, no JTAG cable (or any cable) required.

There will be more information on the embedded 2005
in Nurnberg at Xilinx stands (248, 511)

Antti
PS if someone wants to meet me in person
I will be around booth #511 tomorrow tuesday 12:00

> finally I can announce it:
>
> http://www.eubus.net/hydraXC
>
> Reconfigurable "dream" - small and fully reconfigurable computing module.
>
> Designed to be as reconfigurable as possible, eg all of its
> intelligence is loaded at the boot time. The smart system
> management controller allows safe update of the OS image as
> well as the FPGA bitstream over any supported communication
> channel (LAN or serial or other). Of course the new hardware
> and OS can simply be copied to the removable media (miniSD)
> card, no JTAG cable (or any cable) required.
>

Hi Antti,

looks good. So I can now stop building my JopStick as your board
contains everthing (and more) what I need ;-)
However, for my application it's a little bit pricy.
A few questions: About USB and Ethernet: Are there only the PHYs
on the board and you have to implement it in the FPGA?
I can see only one connector - Is this USB or RJ45?

A schematic would be nice to get those questions answered. And
a picture from the back side.

Good work would be interesting to get JOP running on it,
Martin
----------------------------------------------
JOP - a Java Processor core for FPGAs:
http://www.jopdesign.com/

"Martin Schoeberl" <martin.schoeberl@chello.at> schrieb im Newsbeitrag
news:aIiSd.62024$2e4.11649@news.chello.at...
> > finally I can announce it:
> >
> > http://www.eubus.net/hydraXC
> >
> > Reconfigurable "dream" - small and fully reconfigurable computing
module.
> >
> > Designed to be as reconfigurable as possible, eg all of its
> > intelligence is loaded at the boot time. The smart system
> > management controller allows safe update of the OS image as
> > well as the FPGA bitstream over any supported communication
> > channel (LAN or serial or other). Of course the new hardware
> > and OS can simply be copied to the removable media (miniSD)
> > card, no JTAG cable (or any cable) required.
> >
>
> Hi Antti,
>
> looks good. So I can now stop building my JopStick as your board
> contains everthing (and more) what I need ;-)
> However, for my application it's a little bit pricy.
> A few questions: About USB and Ethernet: Are there only the PHYs
> on the board and you have to implement it in the FPGA?
> I can see only one connector - Is this USB or RJ45?
>
> A schematic would be nice to get those questions answered. And
> a picture from the back side.
>
> Good work would be interesting to get JOP running on it,
> Martin
> ----------------------------------------------
> JOP - a Java Processor core for FPGAs:
> http://www.jopdesign.com/

Hi Martin!

please dont  stop designing the JOPstick
- as you said different price categories and
the world is big enough for all of us :)

the connector on board is OTG mini AB
10/100 LAN requires external RJ45 with magnetics.

Antti

Martin Schoeberl wrote:
>>finally I can announce it:
>>
>>http://www.eubus.net/hydraXC
>>
>>Reconfigurable "dream" - small and fully reconfigurable computing module.
>>
>>Designed to be as reconfigurable as possible, eg all of its
>>intelligence is loaded at the boot time. The smart system
>>management controller allows safe update of the OS image as
>>well as the FPGA bitstream over any supported communication
>>channel (LAN or serial or other). Of course the new hardware
>>and OS can simply be copied to the removable media (miniSD)
>>card, no JTAG cable (or any cable) required.
>>
> 
> 
> Hi Antti,
> 
> looks good. So I can now stop building my JopStick as your board
> contains everthing (and more) what I need ;-)
> However, for my application it's a little bit pricy.

So where are the prices ?

Seems this would have a range of prices, as the FPGA changes,
so the smallest one would suit JOP ?

-jg

"Jim Granville" <no.spam@designtools.co.nz> schrieb im Newsbeitrag
news:421a3e83$1@clear.net.nz...
> Martin Schoeberl wrote:
> >>finally I can announce it:
> >>
> >>http://www.eubus.net/hydraXC
> >>
> >>Reconfigurable "dream" - small and fully reconfigurable computing
module.
> >>
> >>Designed to be as reconfigurable as possible, eg all of its
> >>intelligence is loaded at the boot time. The smart system
> >>management controller allows safe update of the OS image as
> >>well as the FPGA bitstream over any supported communication
> >>channel (LAN or serial or other). Of course the new hardware
> >>and OS can simply be copied to the removable media (miniSD)
> >>card, no JTAG cable (or any cable) required.
> >>
> >
> >
> > Hi Antti,
> >
> > looks good. So I can now stop building my JopStick as your board
> > contains everthing (and more) what I need ;-)
> > However, for my application it's a little bit pricy.
>
> So where are the prices ?
>
> Seems this would have a range of prices, as the FPGA changes,
> so the smallest one would suit JOP ?

the pricing is not fixed yet, basically the modules (2 PCB variants)
can be fitted with any S3 or V4 in FT256 or SF363 package
the S3 version is mainly targetted for S3-1000 but could also
be fitted with S3-200 for some applications.

As much as I know JOP should fit the smallest one..

MicroBlaze uClinux will be as primary default hardware
config and O/S, but other options will be offered as well
LEON3 as secondary and possible OpenRisc as 3rd in line

Sure it is also possible to have something completly different
hardware as well, there is actually no requirement to use any
softcore processor at all.

At boot the FPGA is loaded either from onboard flash or
from miniSD, after the configuration FPGA has full access
to all connected peripherals and resources, ie can continue
boot by loading OS image from onchip flash or from miniSD
card, after OS comes alive it can load secondary hardware
and probably second OS over LAN, then request reboot
from system management controller.

if the second configuration should be faulty the system
management controller restores known good configuration
that allows access again over network (or other communication
channel)

The limit of different hardware configurations is only limited
by the size of the miniSD card used, there is no fixed limit
as by systemace.

Antti

Antti Lukats wrote:
> Hi
> 
> finally I can announce it:
> 
> http://www.eubus.net/hydraXC
> 
> Reconfigurable "dream" - small and fully reconfigurable computing module.

  Does the IrDA optics HW support FIR ( 4Mb/s) and VFIR (16 Mb/s) ?
( and/or Remote control ? )

  Been interested in testing VFIR, but as yet, not much in the HW
support, but the newest optics do.
-jg

Antti Lukats wrote:

> Hi
> 
> finally I can announce it:
> 
> http://www.eubus.net/hydraXC

Small oops - I see the Web table excludes USB-480Mb on the Model 10, but
the PDF info includes that ? Which is correct ?

-jg

>> So where are the prices ?

I've found EUR 295,- for a S3-1000 populated board at the
hydraXC shop (but it's in german - easy for me ;-)

>>
>> Seems this would have a range of prices, as the FPGA changes,
>> so the smallest one would suit JOP ?
>
1808 LCs, 47% of the S3-200, as ported to the S3 Starter Kit ;-)
For Antti's board we would need a few LCs more for the
SDRAM controller.
BTW: Are there SDRAM, USB and Ethernet controller
(in VHDL) available for your board?

> At boot the FPGA is loaded either from onboard flash or
> from miniSD, after the configuration FPGA has full access
> to all connected peripherals and resources, ie can continue
> boot by loading OS image from onchip flash or from miniSD
> card, after OS comes alive it can load secondary hardware
> and probably second OS over LAN, then request reboot
> from system management controller.

> if the second configuration should be faulty the system
> management controller restores known good configuration

As, I'm also considering an SD card for the FPGA configuration
and user data I'm very interested in your solution.
How do you manage the fall back configuration? All this is
done in a CPLD? You're doing a minimal FAT in the CPLD?

Martin 

"Antti Lukats" <antti@openchip.org> writes:
> finally I can announce it:
> http://www.eubus.net/hydraXC

Looks nice.  Is there a pricing and availability page in English?

Thanks,
Eric

"Jim Granville" <no.spam@designtools.co.nz> schrieb im Newsbeitrag
news:421a51aa$1@clear.net.nz...
> Antti Lukats wrote:
>
> > Hi
> >
> > finally I can announce it:
> >
> > http://www.eubus.net/hydraXC
>
> Small oops - I see the Web table excludes USB-480Mb on the Model 10, but
> the PDF info includes that ? Which is correct ?
>
> -jg
>

S3-1000 fitted module includes USB

Antti