block adder for Altera!

hi
my name is Cecilia and I'm a student in engineering at the university of 
Modena & Reggio Emilia. For my disseration I must work with Altera's FPGA. 
I must analize signals from an EEG with multipliers and adders. the signal's 
type is real, (float precision) so I'm working, to get my pourpuse, with 
floating point. Well, I found the multiplier for floating point in the mega 
wizard plug in manager (altfpmult) and it works well, but I can't find an 
adder/subtracter for floating point! I' ve tried to built one with VHDL, but 
I'm far from the target (it's not so easy..).
So I ask you if you can find me an adder subctracter (obviously free...! the 
univesity wouldn't spend any money for my project!!)and can explain me the 
way to use it (I don't have the complete knowledge of the Quartus!)
I'm using the Quartus II SJ web edition version 4.2 Built
156.I'll develop my project on a Cyclone II technology. Thank you....! 
Cecilia


NB. I've alredy searched in the IP megastore but their cores are too much 
expensive! 

cecilia annovi wrote:

> type is real, (float precision) so I'm working, to get my pourpuse, with 
> floating point. Well, I found the multiplier for floating point in the mega 
> wizard plug in manager (altfpmult) and it works well, but I can't find an 
> adder/subtracter for floating point! I' ve tried to built one with VHDL, but 
> I'm far from the target (it's not so easy..).
> So I ask you if you can find me an adder subctracter 

look in:
http://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/

          -- Mike Treseler

The next version of Quartus will have a floafting point, 
addition/subtraction megafunction. It is due to be released in early Q2 of 
2005.

- Subroto Datta
Altera Corp.

"cecilia annovi" <shaula82@tiscali.it> wrote in message 
news:4220b713$0$6320$5fc30a8@news.tiscali.it...
> hi
> my name is Cecilia and I'm a student in engineering at the university of 
> Modena & Reggio Emilia. For my disseration I must work with Altera's FPGA. 
> I must analize signals from an EEG with multipliers and adders. the 
> signal's type is real, (float precision) so I'm working, to get my 
> pourpuse, with floating point. Well, I found the multiplier for floating 
> point in the mega wizard plug in manager (altfpmult) and it works well, 
> but I can't find an adder/subtracter for floating point! I' ve tried to 
> built one with VHDL, but I'm far from the target (it's not so easy..).
> So I ask you if you can find me an adder subctracter (obviously free...! 
> the univesity wouldn't spend any money for my project!!)and can explain me 
> the way to use it (I don't have the complete knowledge of the Quartus!)
> I'm using the Quartus II SJ web edition version 4.2 Built
> 156.I'll develop my project on a Cyclone II technology. Thank you....! 
> Cecilia
>
>
> NB. I've alredy searched in the IP megastore but their cores are too much 
> expensive!
> 

thank you very much...but when the new version of Quartus will be released? 
I'll have my dissertation in april! thanks again Cecilia




"Subroto Datta" <sdatta@altera.com> ha scritto nel messaggio 
news:Xg8Ud.9017$4J7.5761@newssvr31.news.prodigy.com...
> The next version of Quartus will have a floafting point, 
> addition/subtraction megafunction. It is due to be released in early Q2 of 
> 2005.
>
> - Subroto Datta
> Altera Corp.
>
> "cecilia annovi" <shaula82@tiscali.it> wrote in message 
> news:4220b713$0$6320$5fc30a8@news.tiscali.it...
>> hi
>> my name is Cecilia and I'm a student in engineering at the university of 
>> Modena & Reggio Emilia. For my disseration I must work with Altera's 
>> FPGA. I must analize signals from an EEG with multipliers and adders. the 
>> signal's type is real, (float precision) so I'm working, to get my 
>> pourpuse, with floating point. Well, I found the multiplier for floating 
>> point in the mega wizard plug in manager (altfpmult) and it works well, 
>> but I can't find an adder/subtracter for floating point! I' ve tried to 
>> built one with VHDL, but I'm far from the target (it's not so easy..).
>> So I ask you if you can find me an adder subctracter (obviously free...! 
>> the univesity wouldn't spend any money for my project!!)and can explain 
>> me the way to use it (I don't have the complete knowledge of the 
>> Quartus!)
>> I'm using the Quartus II SJ web edition version 4.2 Built
>> 156.I'll develop my project on a Cyclone II technology. Thank you....! 
>> Cecilia
>>
>>
>> NB. I've alredy searched in the IP megastore but their cores are too much 
>> expensive!
>>
>
> 

cecilia annovi wrote:
> thank you very much...but when the new version of Quartus will be released? 
> I'll have my dissertation in april! thanks again Cecilia
> . . .
> but how can I use these packages? I don't have much experience with VHDL...
> I have already tried to include a package in a project but unsuccessfully
> ...thanks a lot again Cecilia

Consider simplifying or delaying your dissertation.
A marketing "Q2" means July 1, and learning vhdl
any sooner is unlikely.

           -- Mike Treseler

hi
     even i was struggling with floating point calculation in vhdl...a
simple search on google landed me on the following website.

www.perso.ens-lyon.fr/jeremie.detrey/FPLibrary/ 

i tried the routines in xilnx ise + modelsim...it worked fine.

nisheeth

cecilia annovi wrote:

> my name is Cecilia and I'm a student in engineering at the university of 
> Modena & Reggio Emilia. For my disseration I must work with Altera's FPGA. 
> I must analize signals from an EEG with multipliers and adders. the signal's 
> type is real, (float precision) so I'm working, to get my pourpuse, with 
> floating point. Well, I found the multiplier for floating point in the mega 
> wizard plug in manager (altfpmult) and it works well, but I can't find an 
> adder/subtracter for floating point! I' ve tried to built one with VHDL, but 
> I'm far from the target (it's not so easy..).

First, do you really need floating point, and, if so, how big an 
exponent range do you need?   Floating point multiply isn't much 
harder than fixed point, especially if you have multiply 
hardware like many FPGAs now do.  Floating point add requires a 
barrel shifter which is pretty big.  If you want full IEEE 
standard there is a lot more logic required.

On many processors floating point is easy and just about as fast 
as fixed point, so much scientific and engineering programming 
is done that way.  That doesn't mean that it needs to be done 
that way.  Reducing the exponent range will simplify floating 
point addition somewhat, though you will have to learn something 
about floating point hardware to do that, and most likely you 
will anyway.

Though the usual reason for using FPGAs for computation is 
speed, and I don't believe that EEGs are so fast as to require 
that speed.  You might be able to do what you need in software 
on an FPGA based processor.

-- glen

>
> www.perso.ens-lyon.fr/jeremie.detrey/FPLibrary/
>
> i tried the routines in xilnx ise + modelsim...it worked fine.

The link seems to be broken.

Martin 

I've found it anyway...thank you! but with the Quartus II I've many problems 
to use this package...

Cecilia Annovi


"Martin Schoeberl" <martin.schoeberl@chello.at> ha scritto nel messaggio 
news:xJ1Vd.72929$2e4.70358@news.chello.at...
> >
>> www.perso.ens-lyon.fr/jeremie.detrey/FPLibrary/
>>
>> i tried the routines in xilnx ise + modelsim...it worked fine.
>
> The link seems to be broken.
>
> Martin
> 

Since you are at a university you can get a copy of
Synplify Pro through our university program which should fix your problem.

cecilia annovi wrote:
> I've found it anyway...thank you! but with the Quartus II I've many problems 
> to use this package...
> 
> Cecilia Annovi
> 
> 
> "Martin Schoeberl" <martin.schoeberl@chello.at> ha scritto nel messaggio 
> news:xJ1Vd.72929$2e4.70358@news.chello.at...
> 
>>>www.perso.ens-lyon.fr/jeremie.detrey/FPLibrary/
>>>
>>>i tried the routines in xilnx ise + modelsim...it worked fine.
>>
>>The link seems to be broken.
>>
>>Martin
>>
> 
> 
>