Gabor wrote:> It's a good bet that they didn't use any NAND gates to generate > ones or zeroes! This sounds like a mathematician kind of question > rather than engineering...A rose by another name. I read NOT, ZERO, and ONE as inverter, tied low, tied high. -- Mike Treseler
Universal logic modules vs NAND-like modules
Started by ●May 15, 2005
Reply by ●May 17, 20052005-05-17
Reply by ●May 20, 20052005-05-20
Candida Ferreira wrote:> "rickman" wrote: > > > I don't follow. Multiplexers are as complete as any logic element. > > I'm not sure what you mean by a 3-multiplexer, but I will assumeyou> > mean a 2 input mux with a single control input. You can get a NOT > > function by putting a 1 on the I0 input and a 0 on the I1 input and > > your signal on the sel input. > > That's true and does not contradict the definition of a ULM, but youneed> the 1 and the 0 to create a NOT. Without them you cannot create a NOTwith> the 3-multiplexer. But there are other functions, such as the NANDand the> NOR functions that, by themselves, can create any other function,without> needing the NOT, the ZERO and the ONE. These are the ULMs I want to > distinguish from the more ordinary ones.Why?
Reply by ●May 20, 20052005-05-20
Gabor wrote:> Mike Treseler wrote: > > Candida Ferreira wrote: > > > > > NAND and NOR functions by themselves can be used to describe any > other > > > function, including NOT, ZERO and ONE. > > > > True. NCR once produced a computer using only NAND gates. > > > > It's a good bet that they didn't use any NAND gates to generate > ones or zeroes! This sounds like a mathematician kind of question > rather than engineering...Someone needs to tell me how to create a one or zero using only NAND gates. The only thing I can think of would be to use two gates in a loop. This will have two stable states, 1-0 and 0-1. The two free inputs will set the gates to the two states when taken low since any input at a zero will make the output of the gate a one. One of these free inputs is tied to its twin input to make an inverter. The other is tied to its own gate output. If the gate output is a one, it causes no action on the gate and is stable. If a zero, it will cause itself to become a one and be then be stable. But this will only generate a stable output after some period of time. Not exactly my idea of a useful circuit.
Reply by ●May 20, 20052005-05-20
rickman wrote:> Gabor wrote: > > Mike Treseler wrote: > > > Candida Ferreira wrote: > > > > > > > NAND and NOR functions by themselves can be used to describeany> > other > > > > function, including NOT, ZERO and ONE. > > > > > > True. NCR once produced a computer using only NAND gates. > > > > > > > It's a good bet that they didn't use any NAND gates to generate > > ones or zeroes! This sounds like a mathematician kind of question > > rather than engineering... > > Someone needs to tell me how to create a one or zero using only NAND > gates. > > The only thing I can think of would be to use two gates in a loop. > This will have two stable states, 1-0 and 0-1. The two free inputs > will set the gates to the two states when taken low since any inputat> a zero will make the output of the gate a one. One of these free > inputs is tied to its twin input to make an inverter. The other is > tied to its own gate output. If the gate output is a one, it causesno> action on the gate and is stable. If a zero, it will cause itself to > become a one and be then be stable. > > But this will only generate a stable output after some period oftime.> Not exactly my idea of a useful circuit.This is why I said the problem was mathematical and not engineering. A Boolian NAND gate performs a truth function on ones and zeroes only. This is not the same as a Verilog NAND gate which can take X or Z as well as 1 or 0 and produce X as well as 0 or 1. The Boolian NAND also does not imply a time delay. So given such a gate with an unknown input "A", you can produce the inversion of the unknown input "A_BAR" (A NAND A), and then create 1 by NANDing "A" with "A_BAR" (A NAND A_BAR). Zero requires an additional inverter (1 NAND 1). In the real world this would produce glitches whenever "A" changed state.
Reply by ●May 20, 20052005-05-20
"rickman" <spamgoeshere4@yahoo.com> writes:> Someone needs to tell me how to create a one or zero using only NAND > gates.Not desperately needing it, but anyway: x nand (x nand x) = x nand not(x) = 1 and then [x nand (x nand x)] nand [x nand (x nand x)] = 0 MB -- Michel BILLAUD billaud@labri.fr LABRI-Universit� Bordeaux I tel 05 4000 6922 / 05 5684 5792 351, cours de la Lib�ration http://www.labri.fr/~billaud 33405 Talence (FRANCE)
Reply by ●May 20, 20052005-05-20
"Gabor" <gabor@alacron.com> writes:> The Boolian NAND also does not imply a time delay. So given such a > gate with an unknown input "A", you can produce the inversion of the > unknown input "A_BAR" (A NAND A), and then create 1 by NANDing "A" > with "A_BAR" (A NAND A_BAR). > Zero requires an additional inverter (1 NAND 1).[nand]> > In the real world this would produce glitches whenever "A" changed > state.In the real world, who needs to get 0 and 1 from whatever gate anyway ? BTW, this reminds me of a funny paper on how to build a triple not circuit using only 2 not gates (and a number of and- and or- gates). MB>-- Michel BILLAUD billaud@labri.fr LABRI-Universit� Bordeaux I tel 05 4000 6922 / 05 5684 5792 351, cours de la Lib�ration http://www.labri.fr/~billaud 33405 Talence (FRANCE)
Reply by ●May 20, 20052005-05-20
"rickman" <spamgoeshere4@yahoo.com> wrote in message news:1116601616.991555.190970@o13g2000cwo.googlegroups.com...> Candida Ferreira wrote: > > "rickman" wrote: > > > > > I don't follow. Multiplexers are as complete as any logic element. > > > I'm not sure what you mean by a 3-multiplexer, but I will assume > you > > > mean a 2 input mux with a single control input. You can get a NOT > > > function by putting a 1 on the I0 input and a 0 on the I1 input and > > > your signal on the sel input. > > > > That's true and does not contradict the definition of a ULM, but you > need > > the 1 and the 0 to create a NOT. Without them you cannot create a NOT > with > > the 3-multiplexer. But there are other functions, such as the NAND > and the > > NOR functions that, by themselves, can create any other function, > without > > needing the NOT, the ZERO and the ONE. These are the ULMs I want to > > distinguish from the more ordinary ones. > > Why? >
Reply by ●May 20, 20052005-05-20
"rickman" wrote:> Candida Ferreira wrote: > > "rickman" wrote: > > > > > I don't follow. Multiplexers are as complete as any logic element. > > > I'm not sure what you mean by a 3-multiplexer, but I will assume > you > > > mean a 2 input mux with a single control input. You can get a NOT > > > function by putting a 1 on the I0 input and a 0 on the I1 input and > > > your signal on the sel input. > > > > That's true and does not contradict the definition of a ULM, but you > need > > the 1 and the 0 to create a NOT. Without them you cannot create a NOT > with > > the 3-multiplexer. But there are other functions, such as the NAND > and the > > NOR functions that, by themselves, can create any other function, > without > > needing the NOT, the ZERO and the ONE. These are the ULMs I want to > > distinguish from the more ordinary ones. > > Why? >Because with them you can find interesting solutions using just one kind of gate. I think that, if for nothing else, this might be fun. And if fpga technology allows people to use different kinds of gate such as the 3-multiplexer, why not use other complex modules? And if you know for sure the module you are using is a NAND-like module you can even relinquish the use of inverters and build circuits using just that gate. Candida --- Candida Ferreira, Ph.D. Chief Scientist, Gepsoft http://www.gene-expression-programming.com/author.asp GEP: Mathematical Modeling by an Artificial Intelligence http://www.gene-expression-programming.com/gep/Books/index.asp Modeling Software http://www.gepsoft.com/gepsoft/ Get APS 3.0 Std free with the book!
