Does anyone have any experience of running Actel Designer on Linux? We currently use WinXP, and have recently been informed that if we used Linux, then Designer would run 10x faster. I would just like to see if anyone out there can confirm this before trying to get a machine set up with Linux. Also since I'm talking about Linux, is there any preference as to which distro is best for FPGA development? Thanks Neill.
Actel Designer on Linux
Started by ●May 19, 2005
Reply by ●May 19, 20052005-05-19
Hi Neill, I tried it on my Gentoo machine and failed miserably (java issue). If you want to try a distro I would suggest one of the free RedHat enterprise clones such as Whitebox and Centos. If designer runs 10x faster under Linux then I will build myself a RH box immediately since designer for ProASIC is sooooo slow :-) Hans. www.ht-lab.com "Neill A" <neilla@ewst.co.uk> wrote in message news:1116486392.966216.36360@g43g2000cwa.googlegroups.com...> Does anyone have any experience of running Actel Designer on Linux? > > We currently use WinXP, and have recently been informed that if we used > Linux, then Designer would run 10x faster. I would just like to see if > anyone out there can confirm this before trying to get a machine set up > with Linux. > > Also since I'm talking about Linux, is there any preference as to which > distro is best for FPGA development? > > Thanks > > Neill. >
Reply by ●May 20, 20052005-05-20
"Neill A" <neilla@ewst.co.uk> wrote:> We currently use WinXP, and have recently been informed that if we used > Linux, then Designer would run 10x faster. I would just like to see if > anyone out there can confirm this before trying to get a machine set up > with Linux.From who do you have this information? I used an old version under Solaris. But the runtime for Solaris and Windows is quite bad compareable du to the complete different HWs. The best thing for me was the possibillity to use a batch workflow under Solaris. bye Thomas
Reply by ●June 3, 20052005-06-03
Well I finally got around to trying it out, but didn't notice any real difference. The following summary gives an idea of the size of the design I tried out: Importer Summary =============== Part-Package: APA600-BG456 Core Slots: 21504 RAM/FIFO Slots: 56 I/O Slots: 356 (Globals: 4) (PLLs: 2) Core Cells: 11965 --> Usage: 55.6 percent RAM/FIFO Cells: 6 --> Usage: 10.7 percent IOs: 352 --> Usage: 99.4 percent PLLs: 2 --> Usage: 100.0 percent Constraints processed: IO constraints: 351 Path constraints: 0 Placement constraints: 0 Net constraints: 4 I/O Cells: Core cells: | Instances | Gates | Tiles Input. IOs: 87 ----------|-----------|--------|------- Bidir IOs: 80 Logic | 8777 | 20183 | 8777 Output IOs: 185 Storage | 3185 | 25215 | 3188 Global IOs: 0 RAM/FIFO | 6 | 54144 | 48 Internal Global: 0 | | | ----------------------- ----------|-----------|--------|------- Total IOs: 352 Total | 11968 | 99542 | 12013 The windows machine used for the test was a Pentium 4 2.4GHz with 512MB RAM running WIN XP SP2. The Linux machine was an Athlon XP2200+ with 512MB RAM running CentOS 4 (RHEL 4 clone). In both case the run time for layout was ~50 mins, so it seems the information I received was clearly wrong.