FFT with FPGA

Hello,

I want to implement a 128bit FFT with FPGA, do you have any reference
design for me?

Thanks in advance,

Mike

Hi All,

I am trying to speed up the FFT on my embedded system. Here are some
details questions on my project.

1, For different FPGA venders, what are the Pros and Cons of Xilinx?
2. How long would it take for a 128 pt complex FFT?
3, How does my CPU connect to the FPGA?
4. How many gate or memory do I need, which Xilinx chip should I pick?

Thanks for your help,

Mike

The hardware resources used depend on your implementation but should
conveniently fit in a spartan-3e from xilinx or cyclone from altera.
The cpu connects to the fpga like any other device, through pins.
Again your latency depends on your architecture and may range from a
few clock cycles to hundreds of clock cycles.
xilinx or altera will both do the job fine.

Hi Mike,

> 1, For different FPGA venders, what are the Pros and Cons of Xilinx?

We are great. :)

> 2. How long would it take for a 128 pt complex FFT?
> 4. How many gate or memory do I need, which Xilinx chip should I pick?

You can find this information - and more - in the datasheet of our FFT
LogiCORE:

http://www.xilinx.com/ipcenter/catalog/logicore/docs/xfft.pdf

> 3, How does my CPU connect to the FPGA?

That will rather depend on your CPU, and the data bandwidth you require.
There are many different external bus standards, but most are variations on
a theme and are not too hard to get running. We have reference designs
available for certain common standards, such as the TI EMIF.

Hope this helps,

           -Ben-

Mike,

Xilinx, Altera and Lattice have devices that can do the job. You
didn't mention the clock frequency however, and this will limit the
number of devices to pick from.
Some reference points:
Xilinx's Spartan3 has multipliers(18x18 only), but no Add/Sub in the
DSP block, Virtex4 has a full featured DSP engine (see datasheet)

Altera's Cyclone has no DSP block at all, Cyclone2 has multipliers
(18x18 and 9x9), Stratix and Stratix2 also have a full featured DSP
block (9x9, 18x18 and 36x36) with Add/sub/Accum.

Lattice's ECP has a full featured DSP block (9x9, 18x18 and 36x36),
Add, Sum and Accumulate, Input & Output and Intermediate registers.
They don't have a high-end FPGA fabric comparable with Stratix and
Virtex4. The DSP performance of the low cost ECP is comparable with
Stratix. So maybe this device can be a good starting point for a
benchmark study.

All of the 3 vendors have IP to support the multiplier blocks
(including FFT128). But as I mentioned above, performance and price
will depend on the family of devices you will chose. If you consult
the website, you will find at least a datasheet which will answer your
questions.

Regards,

Luc

On 19 May 2005 22:12:37 -0700, "Mike" <mail2mz@gmail.com> wrote:

>Hi All,
>
>I am trying to speed up the FFT on my embedded system. Here are some
>details questions on my project.
>
>1, For different FPGA venders, what are the Pros and Cons of Xilinx?
>2. How long would it take for a 128 pt complex FFT?
>3, How does my CPU connect to the FPGA?
>4. How many gate or memory do I need, which Xilinx chip should I pick?
>
>Thanks for your help,
>
>Mike