User Core to PLB Bus example for Virtex 2P in EDK.

Does anyone has an example of a user IP core hooked up to the PLB bus
for a Virtex 2P in EDK?
 I am wondering how I can get my core to be connected to the PLB bus in
the Virtex 2P anmd controlled it viua Software,
I am using Xilinx EDK.

Thanks
NR

The "Create and Import Peripheral Wizard" is the place to start.
It generates an example user pcore and the device drivers to interface
to it.
http://www.xilinx.com/ise/embedded/est_rm.pdf

Paul

nrivera.eng@gmail.com wrote:
> 
> Does anyone has an example of a user IP core hooked up to the PLB bus
> for a Virtex 2P in EDK?
>  I am wondering how I can get my core to be connected to the PLB bus in
> the Virtex 2P anmd controlled it viua Software,
> I am using Xilinx EDK.
> 
> Thanks
> NR