HDL simple survey - what do you actually use

Started by john January 10, 2018
I'm trying to decide on which to use for a project as the main default  that may 
include a number of freelance people.

can you say which of these you actually use (the most)
and have the best skills in

Verilog 
systemVerilog
SystemC
VHDL
Other

And if possible what type of work you use it for in general
I dont need to know why you use a particular one - and to avoid 
flame wars request you dont explain that.

I'm just trying to get a general feel for what people here use regularly.

TIA

-- 

john

=========================
http://johntech.co.uk
=========================
john wrote on 1/10/2018 9:17 AM:
> > I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly.
I have always intended to learn Verilog as well as I know VHDL, but I've never found a good text book that covers the gotchas of Verilog. I use VHDL for designing FPGAs. -- Rick C Viewed the eclipse at Wintercrest Farms, on the centerline of totality since 1998
On 01/10/2018 06:17 AM, john wrote:
> > I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly. > > TIA >
VHDL, for both synthesis and testbenching. Some Verilog sneaks into my design when vendor-provided IP cores only come that way, but I'm read-only on it. -- Rob Gaddi, Highland Technology -- www.highlandtechnology.com Email address domain is currently out of order. See above to fix.
On Wednesday, January 10, 2018 at 6:17:32 AM UTC-8, john wrote:
> I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly. > > TIA > > -- > > john > > ========================= > http://johntech.co.uk > =========================
VHDL for RTL (primarily FPGAs but ASIC in the past). VHDL + OSVVM for testbenches.
On 01/10/2018 07:17 AM, john wrote:
> > I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly. > > TIA >
Verilog for FPGAs
On Wednesday, January 10, 2018 at 6:17:32 AM UTC-8, john wrote:
> I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly. > > TIA > > -- > > john > > ========================= > http://johntech.co.uk > =========================
VHDL, it is a forced requirement for military products. Weng
On Wednesday, January 10, 2018 at 7:33:10 PM UTC+2, Rob Gaddi wrote:
> On 01/10/2018 06:17 AM, john wrote: > > > > I'm trying to decide on which to use for a project as the main default that
may
> > include a number of freelance people. > > > > can you say which of these you actually use (the most) > > and have the best skills in > > > > Verilog > > systemVerilog > > SystemC > > VHDL > > Other > > > > And if possible what type of work you use it for in general > > I dont need to know why you use a particular one - and to avoid > > flame wars request you dont explain that. > > > > I'm just trying to get a general feel for what people here use regularly. > > > > TIA > > > > VHDL, for both synthesis and testbenching. Some Verilog sneaks into my > design when vendor-provided IP cores only come that way, but I'm > read-only on it. > > -- > Rob Gaddi, Highland Technology -- www.highlandtechnology.com > Email address domain is currently out of order. See above to fix.
The same here. And I don't believe in things like SystemC.
On 10/01/2018 14:17, john wrote:
> > I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people. > > can you say which of these you actually use (the most) > and have the best skills in > > Verilog > systemVerilog > SystemC > VHDL > Other > > And if possible what type of work you use it for in general > I dont need to know why you use a particular one - and to avoid > flame wars request you dont explain that. > > I'm just trying to get a general feel for what people here use regularly. > > TIA >
Whilst I don't think I am up to commercial work, as the biggest thing I have done is the BabyBaby https://hackaday.com/2016/01/06/babybaby-a-1948-computer-on-an-fpga/ I will say I also only use VHDL. Dave G4UGM
In article <MPG.34c030a39b84c7ba989753@news.virginmedia.com>, 
anon@example.com says...
> > I'm trying to decide on which to use for a project as the main default that may > include a number of freelance people.
Well that pretty much nails that issue - VHDL it is. Thank you all for the quick and clean replies. -- john ========================= http://johntech.co.uk =========================
Am 11.01.2018 um 14:55 schrieb john:
> In article <MPG.34c030a39b84c7ba989753@news.virginmedia.com>, > anon@example.com says... >> >> I'm trying to decide on which to use for a project as the main default that may >> include a number of freelance people. > > > Well that pretty much nails that issue - VHDL it is. > Thank you all for the quick and clean replies. > >
For HW development I have only used VHDL so far. I personally do not know any Verilog. Though I have used in a project a couple of years ago SystemC for a hardware simulation system, but I have never encountered anyone using it for actual hardware synthesis. Greetz, Sebastian