Hi-Z input

Hallo,
 have connected an external signal to my spartan 3. When the external 
peripheral goes into power down mode, the signal goes into Hi-Z state.

I have made a process sensitive to the external signal.

if (ext_signal = 'Z') then
  ...

Using this syntax the fpga doesn't "see" the high impdance state and 
considerthe signal 0 or 1.

What could I do?

Many Thanks
Marco 

Marco wrote:
> Hallo,
>  have connected an external signal to my spartan 3. When the external
> peripheral goes into power down mode, the signal goes into Hi-Z state.
>
> I have made a process sensitive to the external signal.
>
> if (ext_signal = 'Z') then
>   ...
>
> Using this syntax the fpga doesn't "see" the high impdance state and
> considerthe signal 0 or 1.
>
> What could I do?
>
> Many Thanks
> Marco

This depends on the normal state of the signal when the peripheral
is powered on.  For example if it is usually high, you could add
a pulldown to the pin and watch for it to go low when the peripheral
powers down.  If the signal is usually switching, you could add
some logic to count time since the last transition and indicate
that the signal is inactive if it hasn't changed in some time-out
period.  You should still place a pullup or pulldown on the I/O
to prevent unwanted toggling from noise.

If you have several pins connected to the peripheral, you could pull
them all down and look for all pins zero.  This reduces the chance of
mistakenly detecting a powered down peripheral (assuming all pins
low is not a typical state of the interface).

You need to remember a "Z" is not a third defined state of the signal.
The signal will be either 0, 1, or floating between 0 and 1 (that's Z).

What you should do is pull the ext_signal either to 0 or 1 and if the
external peripheral lets go of the signal you'll know because there
will be no activity on the ext_signal for X seconds and the signal will
be in a defined 0 or 1 state.

You define X.

If I knew what your external peripheral was I could help you more.

Eric

"Eric" <ericjohnholland@hotmail.com> wrote in message 
news:1125496434.910312.279590@g49g2000cwa.googlegroups.com...
> You need to remember a "Z" is not a third defined state of the signal.
> The signal will be either 0, 1, or floating between 0 and 1 (that's Z).
>
> What you should do is pull the ext_signal either to 0 or 1 and if the
> external peripheral lets go of the signal you'll know because there
> will be no activity on the ext_signal for X seconds and the signal will
> be in a defined 0 or 1 state.
>
> You define X.
>
> If I knew what your external peripheral was I could help you more.
>
> Eric
>


It is a 16 bit adc with serial interface.
The out of the adc is Z when it doesn't send datas.

Marco 

Z is for data bus drivers.  I don't think
you can use it at an input and have it make any sense.

You should probably pull down or pull up your input
pins in PACE.  I don't know if there is a way to sense
that the device has outputed Zs and therefore has gone
into powerdown.

Brad Smallridge
b r a d @ a i v i s i o n . c o m

"Brad Smallridge" <bradsmallridge@dslextreme.com> wrote in message 
news:11hbuit7s8ddf1c@corp.supernews.com...
>Z is for data bus drivers.  I don't think
> you can use it at an input and have it make any sense.
>
> You should probably pull down or pull up your input
> pins in PACE.  I don't know if there is a way to sense
> that the device has outputed Zs and therefore has gone
> into powerdown.
>
> Brad Smallridge
> b r a d @ a i v i s i o n . c o m
>
>

I have seen I can chhose pull up or pull down into PACE, but could you 
explain what does it means pull up, or pull down, please?

Thanks
Marco 

Marco wrote:
> Hallo,
>  have connected an external signal to my spartan 3. When the external
> peripheral goes into power down mode, the signal goes into Hi-Z state.
>
> I have made a process sensitive to the external signal.
>
> if (ext_signal = 'Z') then
>   ...
>
> Using this syntax the fpga doesn't "see" the high impdance state and
> considerthe signal 0 or 1.
>
> What could I do?

I'd be very surprised if the synthesis tool (I presume XST?) didn't
complain or error out on that (ext_signal = 'Z') comparison.  There's
no way for the FPGA logic to detect that a signal is undriven, which is
what happens when a driver is tristated.

About all you can do is to figure out some way for your peripheral to
signal that it's powered up.  I don't know the details of your
peripheral, so that's something you'll have to figure out.

-a

http://en.wikipedia.org/wiki/Pull-up_resistor

I suggest you read the datasheet for your A2D. I have a "funny" feeling
your approach to this problem is wrong.

Eric

> I have seen I can chhose pull up or pull down into PACE, but could you 
> explain what does it means pull up, or pull down, please?

These relate to the internal resistors that you can attach to input pins. A 
pull up
resistor connects from the input pin to the supply voltage and leaves you 
with
a logical '1' if the input is unconnected on your board or connected to 
something
that is in the high Z state, like your peripheral.  Pull down is the same 
concept
accept that the resistor goes to ground leaving you with a logical '0' at 
the input
for unconnected or non-driven inputs.  It's a good idea to have a pullup or
pulldown on any input that may be left unconnected.  These resistors are 
suppose
to be marginal so that there effect can be easily overdriven by any active 
source.

You will also see a choice called a keeper, which tends to drive an 
unconnected
or undriven pin to its last state, that is to supply voltage or to ground. 
Not sure
what that is used for, except, perhaps to save power.

What are you doing that requires you to see the powerdown state?  Perhaps 
the
data from this peripheral has some unused data sequences, like all 1's or 
all 0's
that can be used to signal that powerdown state.

Brad Smallridge
b r a d @ a i v i s i o n . c o m

"Andy Peters" <Bassman59a@yahoo.com> wrote in message 
news:1125515151.589486.295760@f14g2000cwb.googlegroups.com...
> Marco wrote:
>> Hallo,
>>  have connected an external signal to my spartan 3. When the external
>> peripheral goes into power down mode, the signal goes into Hi-Z state.
>>
>> I have made a process sensitive to the external signal.
>>
>> if (ext_signal = 'Z') then
>>   ...
>>
>> Using this syntax the fpga doesn't "see" the high impdance state and
>> considerthe signal 0 or 1.
>>
>> What could I do?
>
> I'd be very surprised if the synthesis tool (I presume XST?) didn't
> complain or error out on that (ext_signal = 'Z') comparison.  There's
> no way for the FPGA logic to detect that a signal is undriven, which is
> what happens when a driver is tristated.
>
> About all you can do is to figure out some way for your peripheral to
> signal that it's powered up.  I don't know the details of your
> peripheral, so that's something you'll have to figure out.
>
> -a
>

I have solved the trouble to manage the Hi-Z state.

After chipselect, the a/d conversion takes 5 clock cycles. After it goes low 
for 1 cycle and then it sends datas through a serial connector.
I have added six states into state machine, it's simple, and works well.

Many Thanks to everyone!!
Marco