Microblaze & Memory DMA operation

Thanks for your help. I have another observation I would like to confirm. It seems that the MSR[29] carry bit, used to determine if the fifo has data, is set by control reads and is not set by data reads. Tbis bit is used by a lot of instructions and as such is not "sticky" like the FSL_Error bit. Has that been your experience?

Terry Fowler ha escrito:

> Thanks for your help. I have another observation I would like to confirm. It seems that the MSR[29] carry bit, used to determine if the fifo has data, is set by control reads and is not set by data reads. Tbis bit is used by a lot of instructions and as such is not "sticky" like the FSL_Error bit. Has that been your experience?

I have never tried it with control reads, only with data reads, and it
works.

Sorry I am late in responding. I have been able to get the FSL to work with the control bits. As mentioned in other posts, the FSL_Error bit is "sticky" and must be manually reset. This can be done with a macro: #define clearmatcherror asm volatile ("msrclr r12,16")

I just upgraded to EDK 7.1 and the new compiler is complaining about the FSL access macros that were working with 6.1?? Has anyone found a fix for this?

Thanks, Terry

Macro problem resolved thanks to Deepesh Shakya. It seems that the assembler syntax changed slightly in going from version 6 to 7 and using the version 7 mb_interface.h fixed my problem.