Hi All I want to download bit file to the FPGA to program it w/out using any GUIs like the JTAG programmer. I need to write some kind of APIs for this. Could anyone suggest how to do this and what would be the kind of interface required for the same. please help Anuja
downlaoding bit files to Xilinx FPGA
Started by ●September 22, 2005
Reply by ●September 22, 20052005-09-22
"Anuja" <thakkar.anuja@gmail.com> schrieb im Newsbeitrag news:1127419460.738414.320340@g43g2000cwa.googlegroups.com...> Hi All > I want to download bit file to the FPGA to program it w/out using anyEvery datasheet explains the serial downloading procedure. Very easy to do. Also downloading via JTAG isnt too difficult. Have a look into the xapps. Regards Falk
Reply by ●September 22, 20052005-09-22
Anuja, I am not familiar with other vendor's tools, but Xilinx's Impact has a batch interface. If you just want a way to automate programming, you can use Impact w/o the GUI. Stephen Anuja wrote:> Hi All > I want to download bit file to the FPGA to program it w/out using any > GUIs like the JTAG programmer. I need to write some kind of APIs for > this. Could anyone suggest how to do this and what would be the kind of > interface required for the same. please help > Anuja
Reply by ●September 23, 20052005-09-23
i dont want to use Impact.. the project requires me to write APIs in C code such that i can download the bit file w/out using any special software
Reply by ●September 23, 20052005-09-23
I went through all the xapps but i dont think they have mentioned clearly.. also i am trying to code in C .. one thing i dont understand is .. if i code in C .. how is the JTAG cable going to understand the commnads or the signals to be sent ??
Reply by ●September 23, 20052005-09-23
Anuja - Xilinx has a sample program called 'playxsvf' that you can customize to your environment. You use the normal Xilinx tools to create your bitfile, then convert it to a .xsvf file. This is the file that playxsvf downloads. You can get the source code from the Xilinx web site, I believe it came with one of their app notes. You then need to modify the source code to work in your environment. I've modified the original code from Xilinx to work in several different environments including one with some dedicated hardware to do the bit shifting. So look around for playxsvf! John Providenza
Reply by ●September 23, 20052005-09-23
Reply by ●September 23, 20052005-09-23
"Anuja" <thakkar.anuja@gmail.com> schrieb im Newsbeitrag news:1127483599.347945.252720@g14g2000cwa.googlegroups.com...> I went through all the xapps but i dont think they have mentioned > clearly.. also i am trying to code in C .. one thing i dont understand > is .. if i code in C .. how is the JTAG cable going to understand the > commnads or the signals to be sent ??To access the parallel port or USB, you need a driver. Regards Falk
Reply by ●September 23, 20052005-09-23
Reply by ●September 24, 20052005-09-24
On 23 Sep 2005 06:51:59 -0700, "Anuja" <thakkar.anuja@gmail.com> wrote:>i dont want to use Impact.. the project requires me to write APIs in C >code such that i can download the bit file w/out using any special >softwareWell, even the code you write is "special" :-) You may find the following helpful: http://www.fpga-faq.org/FAQ_Pages/0038_Config_FPGA_from_a_processor.htm Basically, you need some type of interface from your software to the FPGA hardware for configuration, JTAG is an example, and the Xilinx Serial Slave mode is another. The serial slave mode is the simplest. you need a clocl line, a data line, a program line, and a way to read back done and init. With software you shift the data out 1 bit at a time to the data pin, and you make the clock signal go high and low with software too. This is how the old Xilinx parallel download cable works (for both serial slave and JTAG modes). You should be totally confused by now. Let me try and help: The parallel download cable is called parallel because it uses the parallel port of the PC. BUT it is used to send data serially (one bit at a time) by directly controlling turning various bits of the parallel data on and off. One of these bit is used as the serial slave clock, and another is used for serial slave data. Have a look here at what Xilinx has inside their cable: http://toolbox.xilinx.com/docsan/data/alliance/jtg/fig26.htm Once you understand this, everything else is easy :-) Philip Philip Freidin Fliptronics






