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going backwards, Xilinx ISE 7.1 to ISE 6.3

Started by Rob Young October 3, 2005
I own and use Xilinx ISE 7.1 BaseX and to develop Spartan-3 code.  I have a 
client who owns and uses ISE 6.3 BaseX but is not in a position to upgrade 
to 7.1 right now, policy against changing tools until a project has been 
completed.

Anyway, I have developed some VHDL code that makes use of the filter and 
FIFO IPs from CoreGen and I'd like to just turn it over to them so they can 
integrate it into their project.  The problem is they can't just read the 
.ISE project since Xilinx in their wisdom changed project file formats 
between 6.3 and 7.1 and I can't export my project in a form readable by 6.3. 
It does look like my version of CoreGen and my client's version of CoreGen 
contain the same cores which is promissing.

My solution so far is just to give them the VHDL code and a description of 
the project tree but there as been some confustion at the 6.3 end about how 
to get the CoreGen output re-integrated.  Just giving them the .XCO doesn't 
always work.  Their 6.3 guy has tried to explain the errors to me and they 
sound mostly like pathname-not-found and file-not-found type errors due to 
absolute path information.  So I write them a description of all the 
selected options in the core and their 6.3 guy has to re-create the core 
from their version of CoreGen.  Seems a bit slow and silly.

Suggestions for a better way?

Rob


"Rob Young" wrote:

>My solution so far is just to give them the VHDL code and a description of >the project tree but there as been some confustion at the 6.3 end about how >to get the CoreGen output re-integrated. Just giving them the .XCO doesn't >always work. Their 6.3 guy has tried to explain the errors to me and they >sound mostly like pathname-not-found and file-not-found type errors due to >absolute path information. So I write them a description of all the >selected options in the core and their 6.3 guy has to re-create the core >from their version of CoreGen. Seems a bit slow and silly. > >Suggestions for a better way?
Yes. Don't use the Graphical User Interfaces. GUIs are, well, gooey. Copy the .xco file to a .txt file so that Xilinx tools will not mess with it. Edit this file to fix the paths to be relative. Generate a make file and run coregen in batch mode with that make file specifying the .txt file as the input to coregen. Run this with both the current (7.1) and the version the client is using (6.3) to make sure that it works for both. If it doesn't, see if you can fix the offending lines. You can have any number of Xilinx versions on your system and switch between them by changing the XILINX variable to point to the correct directory and the path as well: set XILINX=C:\Xilinx_dir path C:\Xilinx_dir\bin\nt;%path% It helps if you specified a meaningful directory name when installing like Xilinx_63 or Xilinx_71. I use GNU make as part of the Cygwin package. Make documentation is at: http://www.gnu.org/software/make/manual/html_mono/make.html Cygwin is a "linux" or "unix" command package for windows. See: http://www.cygwin.com/ The make file can also run all of the tools in command line mode. -- Phil Hays to reply solve: phil_hays at not(coldmail) dot com If not cold then hot