this is exactly what i did initialy. when i do that, i cant see any ports corresponding to the outputs ( i.e scl and sda ) when i try to assign those to chip scope pro logic analyzer core using chipscope pro core inserter. im not sure whther the mentioned error comes for that configuration too ( ERROR:924). When i changed the design to the one i explained, Core inserter shows those outports so that i can assign them to trigger ports, but that error comes in the translation stage. CMOS
using i2c core
Started by ●October 17, 2005
Reply by ●October 19, 20052005-10-19
Reply by ●October 19, 20052005-10-19
"the inputbuffer's input and tri_state output buffers output is connected together" and "the input of the tristate output buffer is connected to the output from the core" seems to suggest an extra connection. sda_pad_o to IOBUF.I sda_pad_oen to IOBUF.T sda_pad_i to IOBUF.O pad to IOBUF.IO similar for clock. CMOS wrote:> hi, > the IOBUF im using has 4 pins. > it is made of one TRISTATE output buffer and input buffer. the > inputbuffer's input and tri_state output buffers output is connected > together and function as the IO port for the entity. the input of the > tristate output buffer is connected to the output from the core, which > is always grounded. its enable/disable pin is also controlled by the > core. the output of the input buffer is connected to an input of the > core. > > CMOS
Reply by ●October 20, 20052005-10-20
if i do that there will be an output ( out put of the input Buffer ) without any connections. ( the IO buffer im talking about is made up of one OBUF and one IBUF.). is there a way to post images in this forum, so that i can post the diagram? CMOS
Reply by ●October 20, 20052005-10-20
CMOS wrote:> if i do that there will be an output ( out put of the input Buffer ) > without any connections. ( the IO buffer im talking about is made up of > one OBUF and one IBUF.). > is there a way to post images in this forum, so that i can post the > diagram? > CMOSThen you've found the problem. If you're using one pad for a bidirectional signal, don't use two primitives. Use the *one* IOBUF primitive which has four ports: .I, .O, .T, and .IO. That's what the tools are designed to do. If you wanted to use a primitive to instantiate a flip-flop, you wouldn't get the same results if you instantiated a master latch and a slave latch because (even though a register is a combination of those two) the tool understands the FF as a single element. The tool understands a bidirectional pad as a single element.
Reply by ●October 21, 20052005-10-21
Reply by ●October 21, 20052005-10-21
CMOS wrote:> thats what im using. I just explained the structure of it. >You explained that you were using an IBUF and an OBUF and that the number of connections I listed - the .I, .O, .T, and .IO - fell one showrt for your parts. Parts plural. Are you 1) using an IBUF primitive with .I and .O ports and an OBUFT primitive with a .I, .O, and .T port or are you 2) using a single IOBUF primitive with the _oen connected to the .T, the _o connected to the .I, the _i connected to the .o and the pad connected to the .IO. YOU NEED ONE PRIMITIVE - the IOBUF If you use the IBUF and the OBUFT primitivers, it will be like trying to convince the tools that two latch primitives make up a flop. From before: sda_pad_o to IOBUF.I sda_pad_oen to IOBUF.T sda_pad_i to IOBUF.O pad to IOBUF.IO And also from before: if i do that there will be an output ( out put of the input Buffer ) without any connections. ( the IO buffer im talking about is made up of one OBUF and one IBUF.). You cannot make your own IOBUF from the OBUF and IBUF primitives. Use the IOBUF primitive as declared at: http://toolbox.xilinx.com/docsan/xilinx7/books/data/docs/lib/lib0234_220.html Here the primitive has two buffers but it DOES NOT have an IBUF and an OBUF primitive. It is a single primitive itself. Dogspeed.
Reply by ●October 22, 20052005-10-22
hi, sure, that is exactly what im doing ( using the IOBUF) . i just explained the structure of IOBUF, as it looks like one OBUF and one IBUF connected together. the problem with the IOBUF is translation error "ERROR:924". ( which made me to try various other combinations. ) . i dont even understand that error and there are no xilinx answers associated with it. CMOS
Reply by ●October 24, 20052005-10-24
So I asked if you were sure you had your output hooked up to the .i and the input hooked up to the .o for the IOBUF and I believe that was where you started talking about "not enough signals." It's easy to get confused and hook the .o to the output and the .i to the input which would result in complaints from the tools. "CMOS" <manusha@millenniumit.com> wrote in message news:1129958142.375163.39160@g43g2000cwa.googlegroups.com...> hi, > sure, that is exactly what im doing ( using the IOBUF) . i just > explained the structure of IOBUF, as it looks like one OBUF and one > IBUF connected together. > > the problem with the IOBUF is translation error "ERROR:924". ( which > made me to try various other combinations. ) . > i dont even understand that error and there are no xilinx answers > associated with it. > > CMOS >
Reply by ●October 25, 20052005-10-25





