which is Low power FPGA?

Hi,

Please advice me on low power FPGA available in the market.
which is the low power consumption FPGA among Xilinx - Spartan3L,
Altera - CycloneII, Actel - proASIC3 and Lattice. Is there any review
available on this?

According to me proASIC3 is with low power, but its a flash based FPGA.
Is there any disadvantages with Flash based FPGAs?

Thanks in advance.

Best regards,
HimaSSK.

I think that flash based FPGA has advantages only :)
But they could have smaller capacity then other chips.
First you need to look in datasheets on quiscient power for chips you
interested in.

Spartan3L could have 100-200mW.

regards

Jerzy Gbur

<jerzy.gbur@gmail.com> schrieb im Newsbeitrag
news:1129717174.637512.326670@g44g2000cwa.googlegroups.com...
> I think that flash based FPGA has advantages only :)
> But they could have smaller capacity then other chips.
> First you need to look in datasheets on quiscient power for chips you
> interested in.
>
> Spartan3L could have 100-200mW.
>
> regards
>
> Jerzy Gbur
>

read the datasheet for 3L !

the 3L has NO POWER advantages over s-3 while operationg!
NONE!
exactly the same power consumption as S3

3L only has additional hibernate mode, but that means the FPGA is not
configured during low power hibernation.

Antti

I could nt make out the best low power FPGA among the Spartan3, Cyclone
II and Lattice FPGAs.

Regards,
Himassk

himassk wrote:
> I could nt make out the best low power FPGA among the Spartan3, Cyclone
> II and Lattice FPGAs.
> 
> Regards,
> Himassk

  You need to work it out for your application:
using the vendors mA(Static) and mA/MHz numbers, and also determine if
Typical, or Worst case matters most to you.
  Actual measurements will probably be needed as reality checks.

  Not all these numbers are clearly documented, and with everyone 
claiming to be lowest power, your task will not be easy.

  In particular, Look for what they do NOT say.

example: I see lattice make big claims for 4000Z static Icc over
coolrunner 2, but are very quiet on mA/MHz.
  Perhaps that number does not stack up as well ?

-jg

When you are interested in low power, you must analyze static and
dynamic power separately.
Static power (when the chip is powered up, but not being clocked) used
to be very low, but is significant in the newer smaller-geometry
technology. Static = leakage current depends strongly on temperature.
Make sure you look at both 25 degree and 85 degree values.
Some manufacturers conveniently underreport by mentioning 25 degree
values only :-(

Dynamic power comes from the charging and discharging of capacitances,
and depends therefore on the clock rate of all the various nodes inside
the chip and the I/O. It is proportional to clock frequency, and
increases with the square of the supply coltage (the current increases
linearily, the power obviously with the square of Vcc).
Newer technology reduces internal capacitances, thus use less power at
the same functionality and speed.
But functionality as well as clock rate often increases, and power
might therefore go up anyhow.

Peter Alfke, Xilinx Applications

none of them are really, however you can run the later ones at a 
considerably reduced voltage to achieve dramatic power savings at the 
cost of slower operation.

-- 
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com  
http://www.andraka.com  

 "They that give up essential liberty to obtain a little 
  temporary safety deserve neither liberty nor safety."
                                          -Benjamin Franklin, 1759

OK, you right, you don't have to scream :)
But himassk asked about S3L, and I gave him answer about it.

regards.
Jerzy Gbur

If you are looking for low power static, you can't beat the XP or XO
families from Lattice.  They have a power down pin that reduces the
power to ~ 100 micro amps.  Of course the I/O tristate and such, but
since these devices are flash + sram, the part boots up in less than a
mili second.  If Dynamic power is important and you can fit into a
cpld, look at the CR2 or Mach 4000Z.

Jim,

If I'm not mistaken, the datasheet of the 4000Z provides both static
power, and a graph showing the dynamic power requirements.
There is even a complete technical note about the power coefficients.

On the FPGA side, the Power Calculator can be used for static power,
and gives a very good idea of the requirements when a design is
loaded. Unfortunately this is only true if a full timing simulation is
done and the test vectors are fed back to the power calculator. If you
don't simulate, then you need to give an activity factor.

Luc

On Thu, 20 Oct 2005 07:58:05 +1300, Jim Granville
<no.spam@designtools.co.nz> wrote:

>himassk wrote:
>> I could nt make out the best low power FPGA among the Spartan3, Cyclone
>> II and Lattice FPGAs.
>> 
>> Regards,
>> Himassk
>
>  You need to work it out for your application:
>using the vendors mA(Static) and mA/MHz numbers, and also determine if
>Typical, or Worst case matters most to you.
>  Actual measurements will probably be needed as reality checks.
>
>  Not all these numbers are clearly documented, and with everyone 
>claiming to be lowest power, your task will not be easy.
>
>  In particular, Look for what they do NOT say.
>
>example: I see lattice make big claims for 4000Z static Icc over
>coolrunner 2, but are very quiet on mA/MHz.
>  Perhaps that number does not stack up as well ?
>
>-jg
>
>