Q-bus or Unibus bus transactions in FPGA?

Gabor wrote:

>GPE wrote:
>  
>
>>I did one in a Xilinx XC3064... many, many years ago.
>>Unfortunately, I ditched all the documentation a few years ago... and have
>>done a complete brain purge.  Might still have the DEC documentation,
>>though.  I'll check on Wednesday.
>>
>>It wasn't too hard of a bus to interface to and is quite slow.
>>
>>Good luck,
>>Ed
>>
>>    
>>
>
>I did interfaces many years ago for both buses using PAL's for logic
>and
>74F-series parts for bus drive.  Probably 5V 74FCT parts would also
>work.
>If you're serious about Unibus, you'll need to know that the connector
>pin-out
>in the DEC documentation is for the bus extender cable and not where a
>board plugs in.  A and B connectors are not used for plug-in cards,
>only
>C, D, E and F.  I got a copy of the magic document from someone who
>got it from someone who did PC board work for DEC.
>  
>
Not absolutely true, for Unibus.  There were "quad" boards, and "hex" 
boards.
Usually the hex boards just used the extra space for circuitry, and not 
the A&B
connector pins.  You have to know how the backplane section is wired, 
because
there are a bunch of different ones for different types of interface boards.

>  
>
Jon

Richard wrote:

>[Please do not mail me a copy of your followup]
>
>hmurray@suespammers.org (Hal Murray) spake the secret code
><vaadnSJVHo9ezBDeRVn-hQ@megapath.net> thusly:
>
>  
>
>>>I suppose I'll have to do my own bus handshake implementation from the
>>>Q-bus docs (I think my processor or peripheral handbook that came with
>>>the 11/03 has one in there somewhere).
>>>      
>>>
>>Does it have the specs for the bus transcievers?  I remember using
>>some special DEC chip.
>>    
>>
>
>I do recall seeing the specs for the DEC bus trainceiver chip in the
>handbook, yes.
>  
>
I remember one was the SP380.  One of the features is it wouldn't drag
down the bus if the interface was powered down.  Of course, that would break
the bus grant continuity, so it was a pretty useless feature, at least for
Unibus.

Jon

"Gabor" <gabor@alacron.com> writes:
> If you're serious about Unibus, you'll need to know that the connector
> pin-out in the DEC documentation is for the bus extender cable and not
> where a board plugs in.  A and B connectors are not used for plug-in
> cards, only C, D, E and F.

The AB slots at the ends of a backplane are the Unibus proper.
Single-board peripherals plug into "SPC" (Small Peripheral Controller)
slots which are the CDEF slots.  The AB slots that are not at the ends
of a backplane may be MUD (Modified Unibus Device) or Extended Unibus
(22-bit addressing) slots, and should generally be avoided.

Some peripheral modules are hex size and go into an SPC slot.  They
plug into the AB slots, but don't use any signals from those slots
(with the possible exception of power).

For the Unibus electrical spec and pinout (AB only) see the PDP-11
Unibus Design Description and the PDP-11 Bus Handbook:

    http://bitsavers.org/pdf/dec/unibus/UnibusSpec1979.pdf
    http://bitsavers.org/pdf/dec/pdp11/handbooks/PDP11_BusHandbook1979.pdf

SPC and MUD generally are electrically the same as Unibus, but with
different pinouts.  For the pinouts you have to refer to some of the
processor manuals.  For instance, the SPC pinout is on page 3-8 of the
PDP-11/44 User Guide, or in tabular form on page 5-26:

    http://bitsavers.org/pdf/dec/pdp11/1144/1144_UsersGuide.pdf

That manual has the standard Unibus and MUD slot pinouts in a tabular form
on page 5-25.

Extended Unibus (22-bit addressing), also known as "speical bus" is only
used on a few of the AB slots of the processor backplane of the 11/24
and 11/44.  I haven't seen any docs on it other than in the field
maintenance print sets for those processors, and the maintenance manuals
and prints for the memory that supports it (MS11-Lx, MS11-M, MS11-Px):

    http://bitsavers.org/pdf/dec/pdp11/memory/EK-MS11L-UG-001.pdf
    http://bitsavers.org/pdf/dec/pdp11/memory/EK-MS11P-TM-001_Tech_Oct82.pdf
    http://bitsavers.org/pdf/dec/pdp11/memory/MP00672_MS11L_engDrw.pdf
    http://bitsavers.org/pdf/dec/pdp11/memory/MP01477_MS11P_Sep82.pdf

Briefly, address lines A18L through A21L are present on pins BE2, BE1, AP1,
and AN1 of Extended Unibus slots, but are used for other purposes on normal
Unibus slots.

For the Qbus electrical specs and pinout, see the PDP-11 Bus Handbook
listed above.  But that doesn't cover some of the later Qbus extensions
such as 22-bit addressing.  For that, see Appendix F of the KDF11-B manual:

    http://bitsavers.org/pdf/dec/pdp11/1123/KDF11BA_UsersManual.pdf 

Implementing the Qbus or Unibus protocols in an FPGA is not too difficult.
More of a challenge now is implementing bus drivers and receivers that
meet the electrical specifications.  I've previously posted some notes
on interface chips to Usenet, but I can't find it right now.  My notes
are at:

    http://www.brouhaha.com/~eric/retrocomputing/dec/interfacing/chips.html