Is it legal to write an logical equation for a FPGA LUT in claims of a patent?

Hi,
I am writing a patent application for FPGA and have no prior
experiences with patent writing.

I found that in Xilinx patents, all lookup table equations are
described in AND/OR/Multiplexer circuits in its claims. Describing a
logic connection for a lookup table in claims is much more complex in
English than presenting an equivalent logic equation.

For example, a lookup table has the equation:
Out <= (A*B) + (C*D);

It is much more concise and simpler than describing the circuit in
AND/OR gate circuits.

Do you have experiences with and any advices on writing an equivalent
logic equation in a patent claim field ?

Any consequences?

Thank you.

Weng

Hmm. I assume you mean "acceptable" to the USPTO instead of legal. I suppose 
since Xilinx does hardware, then its claims would be in gates rather than an 
equation which could ambiguously be construed as hardware, software or 
mathematics.  Concise and simple are not the focus of the claims section of 
the patent. The claims have to be narrowed so they don't intrude on other 
patents. If you want a simpler and easy to follow explanation using the 
equation notation, you can put it in the preferred embodiment section.

Brad Smallridge
aivision.com


"Weng Tianxiang" <wtxwtx@gmail.com> wrote in message 
news:1133542596.493746.45760@g43g2000cwa.googlegroups.com...
> Hi,
> I am writing a patent application for FPGA and have no prior
> experiences with patent writing.
>
> I found that in Xilinx patents, all lookup table equations are
> described in AND/OR/Multiplexer circuits in its claims. Describing a
> logic connection for a lookup table in claims is much more complex in
> English than presenting an equivalent logic equation.
>
> For example, a lookup table has the equation:
> Out <= (A*B) + (C*D);
>
> It is much more concise and simpler than describing the circuit in
> AND/OR gate circuits.
>
> Do you have experiences with and any advices on writing an equivalent
> logic equation in a patent claim field ?
>
> Any consequences?
>
> Thank you.
>
> Weng
> 

Hi Brad,
Thank you for your response.

1. Yes, the 'legal' should change to 'acceptable'.

2. I agree with your opinion: "If you want a simpler and easy to follow
explanation using the
equation notation, you can put it in the preferred embodiment section.
"
The question arises when the logic equation in LUT is described in the
preferred embodiment section, but their correspondent logical circuits
are not described in a provisional patent application. When I file for
regular patent application later, claims would be invalid because the
appropriate circuits are not described in provisional patent
application.

So I want to know if there is an approved patent with logical equation
in its claims or if there is someone having experienced similar
scenario, but was declined by USPTO.

Thank you.

Weng

You are asking the wrong people.. you need to ask a patent attorney.  They
are better at filling in the grey areas which is what you want... After
all.. if what you were doing was smart.. it would already be done.. and if
it is.. you had better have a better attorney then they do :-)

besides.. you are asking a public domain news group.. therefore anything you
try to patent later and have describe here has been released into the public
domain before the patent has been applied for :-)

Simon


"Weng Tianxiang" <wtxwtx@gmail.com> wrote in message
news:1133550146.547748.109980@g14g2000cwa.googlegroups.com...
> Hi Brad,
> Thank you for your response.
>
> 1. Yes, the 'legal' should change to 'acceptable'.
>
> 2. I agree with your opinion: "If you want a simpler and easy to follow
> explanation using the
> equation notation, you can put it in the preferred embodiment section.
> "
> The question arises when the logic equation in LUT is described in the
> preferred embodiment section, but their correspondent logical circuits
> are not described in a provisional patent application. When I file for
> regular patent application later, claims would be invalid because the
> appropriate circuits are not described in provisional patent
> application.
>
> So I want to know if there is an approved patent with logical equation
> in its claims or if there is someone having experienced similar
> scenario, but was declined by USPTO.
>
> Thank you.
>
> Weng
>

Simon,
I am asking the right persons who did some inventions before and might
have good experiences with the problem I have met and I am asking for
their advices.

I didn't leak any information about my inventions. Never! But for
advices I would like to ask and don't know well.

How do you know a better layer who, for example, is the first time
dealing with your knowledge area? When you ask layers, they always have
advice for you, even though they are a novice one, or their knowledge
is in different area.

Weng

Simon Peacock wrote:
> You are asking the wrong people.. you need to ask a patent attorney.  They
> are better at filling in the grey areas which is what you want... After
> all.. if what you were doing was smart.. it would already be done.. and if
> it is.. you had better have a better attorney then they do :-)
>
> besides.. you are asking a public domain news group.. therefore anything you
> try to patent later and have describe here has been released into the public
> domain before the patent has been applied for :-)
> 
> Simon
> 
>

Finding a patent attorney with FPGA experience might be difficult.  One way 
to find one, I suppose, is to look at some of the prior art, and see if the 
attorney is close by and still in practice.  The more work you do on your 
own, the cheaper it is in attorney fees.

I don't see anything wrong with Weng asking questions to the group.  He 
didn't reveal any innovation and was just asking about a procedural matter 
of patent writing.

I am not even so sure that revealing the innovation would void his 
opportunity to patent the idea, only put him at risk for someone beating him 
to file, and he already has a provisional patent. I believe that the "offer 
for sale" still triggers starts a one year deadline to get your patent 
filed. And then after that there is a one year deadline to get you foreign 
patents.

As to Weng's original question about provisional patents, I am not able to 
answer.  When I applied for patents, provisional patents didn't exist.

Brad Smallridge
w w w . a i v i s i o n. c o m


"Simon Peacock" <simon$actrix.co.nz> wrote in message 
news:4393db05@news2.actrix.gen.nz...
> You are asking the wrong people.. you need to ask a patent attorney.  They
> are better at filling in the grey areas which is what you want... After
> all.. if what you were doing was smart.. it would already be done.. and if
> it is.. you had better have a better attorney then they do :-)
>
> besides.. you are asking a public domain news group.. therefore anything 
> you
> try to patent later and have describe here has been released into the 
> public
> domain before the patent has been applied for :-)
>
> Simon
>
>
> "Weng Tianxiang" <wtxwtx@gmail.com> wrote in message
> news:1133550146.547748.109980@g14g2000cwa.googlegroups.com...
>> Hi Brad,
>> Thank you for your response.
>>
>> 1. Yes, the 'legal' should change to 'acceptable'.
>>
>> 2. I agree with your opinion: "If you want a simpler and easy to follow
>> explanation using the
>> equation notation, you can put it in the preferred embodiment section.
>> "
>> The question arises when the logic equation in LUT is described in the
>> preferred embodiment section, but their correspondent logical circuits
>> are not described in a provisional patent application. When I file for
>> regular patent application later, claims would be invalid because the
>> appropriate circuits are not described in provisional patent
>> application.
>>
>> So I want to know if there is an approved patent with logical equation
>> in its claims or if there is someone having experienced similar
>> scenario, but was declined by USPTO.
>>
>> Thank you.
>>
>> Weng
>>
>
> 

You can file for a US patent up to a year after having divulged the
idea.
That grace period does not apply to foreign filing. There you lose the
right to file immediately after divulging. So, foreign filing is more
demanding, not less.

As far as equations vs LUTs, I think it makes no difference. But
equations may be more widely understood.  BTW, the OP is confusing in
the example, using a logic equation that is actually AND and OR...

Peter Alfke (with about 30 patents, but all filed by company patent
lawyers)

Weng Tianxiang schrieb:

> I found that in Xilinx patents, all lookup table equations are
> described in AND/OR/Multiplexer circuits in its claims. Describing a
> logic connection for a lookup table in claims is much more complex in
> English than presenting an equivalent logic equation.
> 
> For example, a lookup table has the equation:
> Out <= (A*B) + (C*D);
> It is much more concise and simpler than describing the circuit in
> AND/OR gate circuits.

After all it is a LUT, so why not describe it as a LUT? List the output
for all 16 input combinations.
It is not more conscise but it is simpler than doing it in english.

Kolja Sulimma

Hi Peter,
Thank you for your response.

You are a famous inventor in Xilinx and I have read many your patents
and learn a lot from your patents.

As a starter for an inventor, I would like to do more myself to save
first investment. The best ideal way for me to follow is to get first
patent filed and successfully approved by PTO. I know it is very
difficult, but It should be much easier than to learn English as 2nd
language. When you have first successful experiences with patent
application, then it will go smoother for next patent applications.

I think it is better to ask for advices and suggestions on the groups
and to get first hand experiences from other experts and to avoid
misstep as much as possible. I met a layer who hasn't finished his
patent license testing yet and prepared to open the patent application
business and to help me file patent applications.

I have read many patents from Xilinx and especially pay attentions on
their claims. No patent claims from Xilinx contain any logical
equations. I did remember once I read a patent that is not Xilinx's,
but certainly contains an equation. But I cannot find it any more.

Using a logical equation for LUT in claim area in a patent certainly
helps explain the idea of the invention. But Xilinx's layers never use
them,  even though in the description area logical equations are used.
So I guess there are some rules in USPTO forbidding to use logical
equations for LUT in patent applications.

Weng


Peter Alfke wrote:
> You can file for a US patent up to a year after having divulged the
> idea.
> That grace period does not apply to foreign filing. There you lose the
> right to file immediately after divulging. So, foreign filing is more
> demanding, not less.
>
> As far as equations vs LUTs, I think it makes no difference. But
> equations may be more widely understood.  BTW, the OP is confusing in
> the example, using a logic equation that is actually AND and OR...
>
> Peter Alfke (with about 30 patents, but all filed by company patent
> lawyers)

Weng Tianxiang wrote:
> Hi,
> I am writing a patent application for FPGA and have no prior
> experiences with patent writing.
> 
> I found that in Xilinx patents, all lookup table equations are
> described in AND/OR/Multiplexer circuits in its claims. Describing a
> logic connection for a lookup table in claims is much more complex in
> English than presenting an equivalent logic equation.
> 
> For example, a lookup table has the equation:
> Out <= (A*B) + (C*D);
> 
> It is much more concise and simpler than describing the circuit in
> AND/OR gate circuits.
> 
> Do you have experiences with and any advices on writing an equivalent
> logic equation in a patent claim field ?

  You should be aware that 'Clarity' and 'Patent' are often mutually 
exclusive :)
  Patent lawyers have motivation to obfuscate, for many reasons.
Patents are merely a license to litigate, (and an income stream for the 
lawyer) so they tend to break  them into many small claims, that can be 
argued.
  If there is prior art, it also helps to sound a lot different, even if 
you are the same.
  This also helps to get over the first hurdle, of Patent examiner.

  Most (all?) FPGA patents will be electronic searchable, so scan those
yourself, and then "work your claim into the gaps" between those patents.

-jg