Virtex2 I/O state in configure phase

Hi
It makes me weird. Till now I thought that on all I/O's is highZ while
V2 is configured.
But it just before starting to work on some I/O's (I've checked only
five or six of all of them) there is logic '1'.
I don't know what to think about it.

Device: xc2v2000fg676 -4C,
Configure: Slave SelectMap by microcontroller.

Do you have an idea, is it normal and why?

best regards
Jerzy Gbur

jerzy.gbur@gmail.com wrote:
> Hi
> It makes me weird. Till now I thought that on all I/O's is highZ while
> V2 is configured.
> But it just before starting to work on some I/O's (I've checked only
> five or six of all of them) there is logic '1'.
> I don't know what to think about it.
> 
> Device: xc2v2000fg676 -4C,
> Configure: Slave SelectMap by microcontroller.
> 
> Do you have an idea, is it normal and why?
> 
> best regards
> Jerzy Gbur
> 

How do you mean checked, with a scope? Are these pins connected to 
anything else on the board?

Could be that there's a pull-up somewhere, incluing a weak pull-up 
within the FPGA.

-- 
Dr. Andrew Greensted      Department of Electronics
Bio-Inspired Engineering  University of York, YO10 5DD, UK

Tel: +44(0)1904 432379    Mailto: ajg112@ohm.york.ac.uk
Fax: +44(0)1904 433224    Web: www.bioinspired.com/users/ajg112

Look at the definition of the HSWAP_EN pin and how you have it strapped in 
your design.

<jerzy.gbur@gmail.com> wrote in message 
news:1136479208.482562.186020@o13g2000cwo.googlegroups.com...
> Hi
> It makes me weird. Till now I thought that on all I/O's is highZ while
> V2 is configured.
> But it just before starting to work on some I/O's (I've checked only
> five or six of all of them) there is logic '1'.
> I don't know what to think about it.
>
> Device: xc2v2000fg676 -4C,
> Configure: Slave SelectMap by microcontroller.
>
> Do you have an idea, is it normal and why?
>
> best regards
> Jerzy Gbur
> 

In DS031 it says:-
"Depending on the system design, several configuration modes are supported, 
selectable via mode pins. The mode pins M2, M1 and M0 are dedicated pins. An 
additional pin, HSWAP_EN is used in conjunction with the mode pins to select 
whether user I/O pins have pull-ups during configuration."
Of course, you know this already because you read the datasheet cover to 
cover before posting! ;-)
HTH, Syms.

<jerzy.gbur@gmail.com> wrote in message 
news:1136479208.482562.186020@o13g2000cwo.googlegroups.com...
> Hi
> It makes me weird. Till now I thought that on all I/O's is highZ while
> V2 is configured.
> But it just before starting to work on some I/O's (I've checked only
> five or six of all of them) there is logic '1'.
> I don't know what to think about it.
>
> Device: xc2v2000fg676 -4C,
> Configure: Slave SelectMap by microcontroller.
>
> Do you have an idea, is it normal and why?
>
> best regards
> Jerzy Gbur
> 

Jerzy, if you check with a high-impedance oscillosope probe, you cannot
detect the difference between an active High (10 Ohm) or 3-stated with
a weak pull-up (multi-kilohms).
To see the difference, load the pin with a kilohm to ground...
Peter Alfke

jerzy.gbur@gmail.com wrote:
> Hi
> It makes me weird. Till now I thought that on all I/O's is highZ while
> V2 is configured.
> But it just before starting to work on some I/O's (I've checked only
> five or six of all of them) there is logic '1'.
> I don't know what to think about it.
>
> Device: xc2v2000fg676 -4C,
> Configure: Slave SelectMap by microcontroller.
>
> Do you have an idea, is it normal and why?
> 
> best regards
> Jerzy Gbur

Peter Alfke napisa�(a):
> Jerzy, if you check with a high-impedance oscillosope probe, you cannot
> detect the difference between an active High (10 Ohm) or 3-stated with
> a weak pull-up (multi-kilohms).
> To see the difference, load the pin with a kilohm to ground...
> Peter Alfke
> 

Thanks all of you.
It's great pleasure to have answers so soon.

I work on this project whole last year, so belive me, I've read V2 
datasheets :)
It's almost finished.
We have problems with other chip which is partially controlled by V2.
And there I use scope on that line where I saw what I wrote in my 
previos post. So...

1. It was scope,
2. I didn't try to check it by resistor pulldown,
3. HSWAP_EN='1' or NC - must check it on schema at work, but not before 
next tuesday :(
4. Checked lines was V2-outputs/others chips inputs - not pulled/up/down 
externally.
5. M2='1' M1='1' M0='0'. - Slave SelectMap mode.

As I wrote earlier I'll be at work next tuesday, and I'll try to use 
your advices.
I'll post results on this topic.

Thank you once more.
Best Regards

Jerzy Gbur

Jerzy Gbur wrote:
> Peter Alfke napisa=B3(a):
> > Jerzy, if you check with a high-impedance oscillosope probe, you cannot
> > detect the difference between an active High (10 Ohm) or 3-stated with
> > a weak pull-up (multi-kilohms).
> > To see the difference, load the pin with a kilohm to ground...
> > Peter Alfke
> >
>
> Thanks all of you.
> It's great pleasure to have answers so soon.
>
> I work on this project whole last year, so belive me, I've read V2
> datasheets :)
> It's almost finished.
> We have problems with other chip which is partially controlled by V2.
> And there I use scope on that line where I saw what I wrote in my
> previos post. So...
>
> 1. It was scope,
> 2. I didn't try to check it by resistor pulldown,
> 3. HSWAP_EN=3D'1' or NC - must check it on schema at work, but not before
> next tuesday :(
> 4. Checked lines was V2-outputs/others chips inputs - not pulled/up/down
> externally.
> 5. M2=3D'1' M1=3D'1' M0=3D'0'. - Slave SelectMap mode.
>
> As I wrote earlier I'll be at work next tuesday, and I'll try to use
> your advices.
> I'll post results on this topic.
>
> Thank you once more.
> Best Regards
>
> Jerzy Gbur

Jerzy,
  I advise you to check out Xilinx Answer record 18277

http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=3D1&iCountryID=
=3D1&getPagePath=3D18277

-Newman

Jerzy,
  You may wish to check out Xilinx answer record 18277 if HSWAP_EN =
'1'.
  The title of the Answer Record is :
  Virtex/Spartan I/O - IO outputs might transition during
configuration.

Hope this helps, it was news to me when I heard it.

- Newman

Hello!

> As I wrote earlier I'll be at work next tuesday, and I'll try to use 
> your advices.
> I'll post results on this topic.

Time is going so fast....

Ok, my fault, It is following reason of V2 behaving, I've checked lines 
which was pulluped. That's all, false alert. I'm sorry, I've disturbed you.

Kind regards

Jerzy Gbur

Newman napisa�(a):
> Jerzy,
>   You may wish to check out Xilinx answer record 18277 if HSWAP_EN =
> '1'.
>   The title of the Answer Record is :
>   Virtex/Spartan I/O - IO outputs might transition during
> configuration.
> 
> Hope this helps, it was news to me when I heard it.

It's new light on my project.
Mhm... I look at it closer on next design.

Thank you very much..

Jerzy Gbur