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ATA controller in fpga

Started by bjzhangwn January 16, 2006
I want to implement an ata controller in the fpga,the controller use
the ultra dma mode to read and write datas,and I want to know if it is
difficult to implement it.Can some one give me some advice.

"bjzhangwn" <bjzhangwn@126.com> wrote in message 
news:1137423677.818816.281490@g43g2000cwa.googlegroups.com...
>I want to implement an ata controller in the fpga,the controller use > the ultra dma mode to read and write datas,and I want to know if it is > difficult to implement it.Can some one give me some advice. >
I advise you to put the subject of your post into a search engine, perhaps Google would be a good start, and see where that takes you. Also :- http://groups.google.com/groups?as_q=ata+controller+fpga I hope Google works in China? HTH, Syms.
bjzhangwn wrote:
> I want to implement an ata controller in the fpga,the controller use > the ultra dma mode to read and write datas,and I want to know if it is > difficult to implement it.Can some one give me some advice. >
check out the ATA core on <www.opencores.org> Regards, Mark
bjzhangwn schrieb:
> I want to implement an ata controller in the fpga,the controller use > the ultra dma mode to read and write datas,and I want to know if it is > difficult to implement it.Can some one give me some advice.
if you need UDMA just go to t13.org, download the spec and start implementing ... the version from opencores does not support full UDMA implementation is straight forward but contstraining and meeting the timings is a little tricky ... I did this as my first learning-VHDL project bye, Michael
thanks,can i have a look at your document or source files?

bjzhangwn schrieb:
> thanks,can i have a look at your document or source files?
I'm sorry I can't disclose any source ... the documents you will need can be found at www.t13.org bye, Michael
> the documents you will need can be found at www.t13.org
Version 6 should be supported by most of the current drives so you could start with this document: http://t13.org/project/d1410r3b-ATA-ATAPI-6.pdf as it describes every detail it has 500 pages (but you won't need most of it) ... start with the electrical interface and pinout you will at least need these functions: - Power-on and hardware reset protocol - Bus idle protocol - PIO data-in and data-out command protocol - Ultra DMA read/write of a block on to of that you can build functinos that perform - device id - set features - read sector/write sector if those are working then you could start with udma - read dma/write dma bye, Michael
Thanks,can i have your msn,and I have some question to ask!
Why should i need the Power-on and hardware reset protocol and the Bus
idle protocol,I think only i just need are the
- PIO data-in and data-out command protocol
- Ultra DMA read/write of a block
Do the registers transfer use the pio protocal?

Where can I find the ata device bus function model for
simulation?Thanks!

> Thanks,can i have your msn,and I have some question to ask!
I don't use msn (and I'm no service hotline) but my e-mail is valid
> Why should i need the Power-on and hardware reset protocol
after power up you want to have the drive in a defined state and you want to find out if and when the drive is ready for your commands ... > and the Bus idle protocol that is what you do with the bus in the gaps between PIO or UDMA transfers ... nothing much but still there is a diagram for that
> Do the registers transfer use the pio protocal?
the PIO protocol *only* gives you acces to the registers ... by reading, writing and reading registers (over PIO) you can do data transfers ... data can be transfered by multiple access to a register (easy case) or by a DMA burst ... that is why you should follow the implementation order described ... ... and maybe you should just start reading the spec bye, Michael