Hi, I interfaced a USB 8 bit data bus with a CPLD. I made a 48 bit buffer ( ser_buff ). I am loading the buffer at each falling edge of the USB clock. and then copying it into another 48 bit buffer ( Temp ) and the serially ouputting the Temp buffer in another process running on different clock. "inc" signal acts as a trigger signal to the other process to start parallel to serial conversion. The problem is that I am not seeing the right data coming out of the CPLD ( ser_out) port. If kept the USB data to zero but at the ser_out, I can still see some ones. Please adivce soon. My code is given below Thanks John Process (State) Begin Data_clk <= DPR_CLK; ser_clk<= count_A(0); second_clock<= count_A(0); Case State is When G0=> ser_buff ( 7 downto 0) <= USB_Data ( 7 downto 0 ); inc<='0'; Latch_ser_buff <='0'; nextstate <=G1; When G1 => ser_buff ( 15 downto 8) <= USB_Data ( 7 downto 0 ); inc <='0'; Latch_ser_buff <='0'; nextstate <=G2; When G2 => ser_buff ( 23 downto 16)<= USB_Data ( 7 downto 0 ); inc<='0'; Latch_ser_buff<='0'; nextstate <=G3; When G3 => ser_buff ( 31 downto 24)<= USB_Data ( 7 downto 0 ); inc <='0'; Latch_ser_buff <='0'; nextstate <=G4; When G4 => ser_buff ( 39 downto 32)<= USB_Data ( 7 downto 0 ); Latch_ser_buff <='0'; inc <='0'; nextstate <=G5; When G5 => ser_buff ( 47 downto 40)<= USB_Data ( 7 downto 0 ); Latch_ser_buff <='0'; inc <='0'; nextstate <=G6; When G6 => Latch_ser_buff <='1'; inc <='0'; nextstate <=G7; When G7 => Latch_ser_buff <='0'; inc <='1'; nextstate <=G7; When others => nextstate <=G0; End case; End Process; Process (USB_CLK, Reset_USB ) Begin If( Reset_USB = '1' OR Second_DPR_Reset = '1') Then LED_RESET_USB <= '1'; State <= G0; Else If( USB_CLK 'Event And USB_CLK = '0') Then LED_RESET_USB <= '0'; State <= nextstate; End If; End If; If( USB_CLK 'Event And USB_CLK = '0' ) Then If (Latch_ser_buff = '0' ) Then Temp <= (others => '0'); Else If (Latch_ser_buff= '1' ) Then Temp<= ser_buff; End If; End If; End If; End Process; Process ( DPR_CLK, Reset_DPR, inc ) Begin If( Reset_DPR = '1' OR Second_DPR_Reset = '1')Then LED_RESET_DPR<='1'; Tag<='1'; P2S_counter<="000000"; --count_A <= "00000"; Else If (DPR_CLK 'event And DPR_CLK='1')Then If ( inc='1' And P2S_counter /= "110000")Then Tag <='0'; LED_RESET_DPR <='0'; P2S_counter <=P2S_counter + 1; ser_out <= Temp ( to_integer( P2S_counter ) ) ; Else End If; End If; End If; If (DPR_CLK 'eventAnd DPR_CLK = '1' ) Then If ( P2S_counter ="110000" ) Then Second_DPR_Reset<= '1'; Else Second_DPR_Reset<= '0'; End If; End If; If ( DPR_CLK 'event And DPR_CLK='1' ) Then count_A<= count_A + 1; End If; End Process; End DPR_ARCH;
CPLD serial buffer problem
Started by ●January 17, 2006