Accessing Ports of a "User to Interface Logic" on a Altera Nios

I�m trying to access the Compact Flash Interface on the Altera Stratix
Board.
Searching Altera�s documentation did not bring any helping topics.
I found out that in the standard_32.sof the CF Adapter is connected to
the Nios Processor via a Avalon Bus Slave
using a "Interface to user logic". The "Interface to user logic" is
named "cf_ide_interface" and looks in SOPC
Builder like this .... 

"Port Name"   Width  Dicrection  Shared   Type
clk             1     input                clk
address         5     input                address
write_n         1     input                write_n
read_n          1     input                read_n
data            16    inout                data

in the generated "excalibur.h" the cf_ide_interface appears seamless
as a poiter to a memory address ...

#define na_cf_ide_interface          ((np_usersocket *) 0x00920a00) //
altera_avalon_user_defined_interface
#define na_cf_ide_interface_base                        0x00920a00

my generic problem is now howto access the different ports at this
memory address because i�m wondering
where does the data start or howto mask for e.g. the write_n bit ?

Can I assume that the ports are aligned in the same order at the
address like they appear in the list
above?

regards sven