Digilent FPGA & Handel-C

Hi all.
I must develop a software for a Digilent 2-SB (with chip Xilinx Spartan 2E) 
coupled with a Digilent Digital I/O 4
I decided to use Handel-C for development , but i don't know what i must 
study to start
I downloaded manuals for both digilent devices (only 14 pages).
Could you counsil me any books or links for beginners?
Thanks very much 

What are you trying to do (design)?
Why did you choose Handel-C? why not VHDL or Verilog?
Roberto wrote:
> Hi all.
> I must develop a software for a Digilent 2-SB (with chip Xilinx Spartan 2E)
> coupled with a Digilent Digital I/O 4
> I decided to use Handel-C for development , but i don't know what i must
> study to start
> I downloaded manuals for both digilent devices (only 14 pages).
> Could you counsil me any books or links for beginners?
> Thanks very much

"Mahmoud" <mahmoud.kassem@gmail.com> ha scritto nel messaggio

> What are you trying to do (design)?
> Why did you choose Handel-C? why not VHDL or Verilog?

i yet studied VHDL and i would like to study a new language as Handel-C.
Do you counsil me VHDL? why? 

If you have to choose a C language I would recommend you check out SystemC 
which might be better on your CV than Handel-C :-) You can download a free 
event based simulator from OSCI. The userguide contains some examples for 
VHDL/Verilog designers. I would also check out Opencores's sc2v SystemC to 
Verilog converter,

http://www.systemc.org/web/sitedocs/library_2_1.html
http://www.opencores.org/projects.cgi/web/sc2v/overview

Hans.
www.ht-lab.com

"Roberto" <gioeroby@NOSPAMlibero.it> wrote in message 
news:Dm2Df.150825$65.4246679@twister1.libero.it...
>
> "Mahmoud" <mahmoud.kassem@gmail.com> ha scritto nel messaggio
>
>> What are you trying to do (design)?
>> Why did you choose Handel-C? why not VHDL or Verilog?
>
> i yet studied VHDL and i would like to study a new language as Handel-C.
> Do you counsil me VHDL? why?
> 

Hans wrote:
> If you have to choose a C language I would recommend you check out SystemC
> which might be better on your CV than Handel-C :-)

What's so good about SystemC? :)

Robin Bruce (robin.bruce@gmail.com) wrote:

: Hans wrote:
: > If you have to choose a C language I would recommend you check out SystemC
: > which might be better on your CV than Handel-C :-)

: What's so good about SystemC? :)

What's so good about AnythingC?

I have quite strong feelings that whilst a high level language than 
Verilog/VHDL could be a real boon to FPGA development, C is far from a 
good prototype form for such a language....

cds

c d saunter wrote:
> I have quite strong feelings that whilst a high level language than
> Verilog/VHDL could be a real boon to FPGA development, C is far from a
> good prototype form for such a language....

Depends greatly on what the application is that is targeted for FPGA's,
and
how much freedom is necessary to divide the application between LUT's,
on chip microproccesors, and specialized statemachines such as p-code
or jave VM's.

For instance writing a pipelined wire speed network stack and
application
targeted for execution on FPGA's as a combination of logic and a VM is
probably SIGNIFICANTLY easier to do in a C based language. Especially
since you can use the same source compiled to LUT's, processors and
VM's to partition the design in various ways as a late project
optimization
or to freely move between specific FPGA chips.

Trying to instantate specific forms of logic for a complicated hardware
design
MIGHT be a bit easier in Verilog/VHDL, while being unable to easily
move the
same source code to a VM or processor as you optimize the system design
or move between target chips.

As with most highly specialized tools, you tradeoff generality and the
degrees
of freedom in design choices gained using more general tools with a
larger
implementation space.

On Mon, 30 Jan 2006 14:01:37 +0000 (UTC),
christopher.saunter@durham.ac.uk (c d saunter) wrote:

>Robin Bruce (robin.bruce@gmail.com) wrote:
>
>: Hans wrote:
>: > If you have to choose a C language I would recommend you check out SystemC
>: > which might be better on your CV than Handel-C :-)
>
>: What's so good about SystemC? :)
>
>What's so good about AnythingC?
>
>I have quite strong feelings that whilst a high level language than 
>Verilog/VHDL could be a real boon to FPGA development, C is far from a 
>good prototype form for such a language....

uh, in what way is C a higher level language than VHDL anyway?

- Brian

A language is high-level with respect to another if it offers a greater
degree of abstraction from the complexities of implementation.

ANSI C is a high-level language with respect to assembler as, amongst
other benefits, it precludes the need to worry about registers.

A C-to-FPGA language, taking it here to mean any language that
approximates the syntax of ANSI C, is only a high-level language with
respect to VHDL when it offers abstraction. An example of such
abstraction would be a C tool that compiles to VHDL that hides the need
to worry about clocks, or lining up of concurrent operations and
pipeline timing.

A language is of a higher level than another if you can obtain the same
functionality while being less specific on exactly how you want the
functionality to be implemented. It has little to do with the extent to
which the code is readable. Theoretically one could design an assembler
whose input was flowery prose. It would look like human language, but
if you still had to specify (albeit it in rhyming couplet) which
variables belonged to which registers, you would have a low-level
language.

C syntax is neither inherently high-level nor low level, and its choice
for C-to-FPGA compilers is near arbitrary. The important issue is the
degree of abstraction, the quality of your compiler, its libraries and
the underlying hardware it generates. Whether the code would look
better resembling Java or C doesn't seem very relevant.

The Java programming language is a higher level language than ANSI C.
On the other hand, JHDL with its java-derived syntax is a lower level
language than SRC's MAP compiler with its C-derived syntax.

So: "uh, in what way is C a higher level language than VHDL anyway?"
isn't an answerable question unless you explain which C-syntax derived
hardware compiler you mean.

Brian Drummond wrote:
> On Mon, 30 Jan 2006 14:01:37 +0000 (UTC),
> christopher.saunter@durham.ac.uk (c d saunter) wrote:
>
> >Robin Bruce (robin.bruce@gmail.com) wrote:
> >
> >: Hans wrote:
> >: > If you have to choose a C language I would recommend you check out SystemC
> >: > which might be better on your CV than Handel-C :-)
> >
> >: What's so good about SystemC? :)
> >
> >What's so good about AnythingC?
> >
> >I have quite strong feelings that whilst a high level language than
> >Verilog/VHDL could be a real boon to FPGA development, C is far from a
> >good prototype form for such a language....
>
> uh, in what way is C a higher level language than VHDL anyway?
> 
> - Brian

Robin Bruce wrote:
> A language is high-level with respect to another if it offers a greater
> degree of abstraction from the complexities of implementation.

And I might note that issues like pipelines and state machines flow
from the semantics of sequential C syntax depending how a C to FPGA
compiler implements that syntax. Pipelines occur naturally in
sequential
C on all platforms when the statement blocks are in an inverted order,
a
trick I have used for a few years and offered in C.A.F before. State
machines are a natural by product of IF-THEN-ELSE sequential statements
in any looping construct such as WHILE.

It is much more natural to implement pipelines and state machines in C
this way for people trained in sequential languages as the results are
visually obvious and timing free. You get the advantage of being able
to
move the same code, between a variety of execution targets, which
traditional HDL's limit.