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BGA central ground matrix

Started by Tim February 1, 2006
>What's the current distribution in the center conductor of a coax >carrying DC?
Argh/blush. Stupid example. How about: What's the currrent distribution in a pair of tightly coupled striplines? -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.
Jim Granville wrote:
> austin wrote: >> dp, >> >> I know you do not belive me. And you haven't ever solved Maxwells >> equations for this case (or else you would see it). >> >> I am not going to convince you, so I will not try, but it is a real >> effect, and it really happens. >> >> I also admit that it is greatly misunderstood (after all, Westinghouse >> believed as you do, util they made a million dollar mistake by >> building it, and experiencing it first hand). > > Take a magnet near the front of a Shadow mask CRT, and you can > clearly see the effect a magnet has on moving (dc) electrons. > DC current requires electrons to move, even if the ammeter does not. > > -jg >
That's a different situation, in that the electrons are moving quickly. The average speed of the electrons moving through a conductor is, AFAIK, very slow.
Austin Lesea wrote:
> Jim, > > It has to do with current creating a magnetic field, and how the > magnetic fields interact. > > Imagine I have a rectangular loop (tall and skinny), divided down the > middle by a sheet of glass. > > On either side of the glass I have a scale (made of plastic) to see how > much the wire pulls away from the glass as the current increases in the > loop. > > At some point, I add a third wire on one side of the glass in parallel. > It is some distance away from the glass, more so that the first set of > wires. > > What I claim is that the force of the third added wire will be less than > that of the first wire, and the force of the first on the same side of > the glass wire will be somewhat less, but will not be 1/2. In fact with > the BART rail spacing, it would be 2/3 and 1/3.
Yes, but in your first example, you claimed DC Current diffences, not forces (kg) on the wires ?!
> > At DC. > > Guess what? Current creates a field, a field tells current how to flow. > > I think Faraday discovered this?
I await your real examples, with hard data. So far, I have placed this in the urban myth box. Some reality checks, from my old, trusty University Physics book: Force on wire = Current * Length * B(Field) B near a long wire = MUo * Current / 2*Pi*R so yes, B falls off inversely with distance. MUo is small, at 4*pi*10e-7 weber/amp-meter ( that's why you need many turns, and small air gaps, in a motor ) Motors start with a force, and then the 'moving wire in magnetic field' law (Lenz's law to some) creates a back-emf, that reduces the current, by reducing the apparent voltage. Now to the Hall effect, (some have quoted as the cause) : Vxy = Current x B(Field) / n * e * thickness Their worked example applied a massive 1.5 weber/m2 to a 20mm x 1mm copper strip and the resulting Hall voltage, across the copper strip was 22uV So, yes, it is an effect, but no, I cannot see it causing a large shift in DC current balance due to the field set up by a single wire. Seems time and the urban myth effect have confused the B field variation ( which DOES fall off with 1/R ), with the DC current, and we are still unclear on the details of what exactly failed westinghouse. So, as to DC current in the inner BGA Balls being a fraction of their outer neighbours, show me some proof. [and remember, this is DC, not AC ] Perhaps a high quality thermal image, good enough to show the ball temerature profiles, due to DC current ? -jg
>MUo is small, at 4*pi*10e-7 weber/amp-meter >( that's why you need many turns, and small air gaps, in a motor )
You can get motion from single turns as long as you use a enough current. The Exploratorium has (had?) an exhibit with several 1 inch dia wires running vertically reasonably close to eachother. They were attached at top and bottom but not constrained in between. 6 or 8 feet high. You step on a switch and it dumps a lot of current into the wires. They move. (I forget the details. It's been a few years since I saw it.) -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.
Jim Granville wrote:
> Please do, we can agree there is an effect, my antennae just question > how much of an effect at DC ?. > > You still have to satisfy ohms law, so any push effects that favour > flow, have to model somehow as mV(uV) generators.... > To skew Ball DC currents 7/8 or 15/16, frankly sounds implausible, and > maybe the models there forgot to include resistance balancing effects ? > [ ie do not believe everything you are 'told' ]
The problem is that there may not be ANY DC component. Consider slowly decreasing the clock period so that all logic paths settle well before the next clock edge. In this case the current goes from zero, to one or more peaks, and back to zero for each clock cycle. Given that the clock in this stable case will be in the megahertz range, it's quite justified to say that the DC effects may just completely vanish, or be insignificant at best. With some very careful design, using multiple clock domains and phased clocks, to time spread with overlap the distribution of dynamic currents to create some DC component based on minimal filtering effects of the on die capacitances. Async designs, have a might better chance of creating some DC component out of the dynamic currents. There might be a DC path in the I/O's from pull ups, pull downs, and slower clock rates.
fpga_toys@yahoo.com wrote:
> > > The problem is that there may not be ANY DC component.
Well, well. It does not take a genius to find out that all current (or power) consumption ends up as a (pulsating) DC current through the chip, from Vcc to ground. Just imagine the transistors as simple switches, and the loads as capacitors. When driving High, charge (current) flows in from Vcc. When driving low, that same charge gets dumped into the ground leads. I call that dc current. there isn't even any reversal of the current direction. Isn't that pretty basic? Peter Alfke
Peter Alfke wrote:
> I call that dc current. there isn't even any reversal of the current > direction. > Isn't that pretty basic?
Well sorta .... it's all about definitions. Reversal is one component of the definition of things that are not pure DC current. http://en.wikipedia.org/wiki/Direct_current http://www.school-for-champions.com/science/dc.htm Continuous is the other. The models for steady continuous DC are different than modeling transient (plused DC) and AC circuits, are they not? When does a high voltage RF AC waveform with a high DC offset, become DC? The rapid changes in fields, and interactions of fields, produces the effects of unbalancing the currents in the ball array do they not? Very low current, low voltage, steady continuous DC should, as suggested, not have much of an imbalance at all since the field strengths will be low. And, one of the problems about pulsed DC, is that it frequently turns into AC due to ringing, aka undershoot. The fact here is, part of the discussion here is how much the current distribution is influenced by traditional continuous DC effects, and how much the distribution is influenced by the transient effects (pulses), is it not? Isn't that pretty basic?
fpga_toys@yahoo.com wrote:

> Jim Granville wrote: > >>Please do, we can agree there is an effect, my antennae just question >>how much of an effect at DC ?. >> >> You still have to satisfy ohms law, so any push effects that favour >>flow, have to model somehow as mV(uV) generators.... >> To skew Ball DC currents 7/8 or 15/16, frankly sounds implausible, and >>maybe the models there forgot to include resistance balancing effects ? >> [ ie do not believe everything you are 'told' ] > > > The problem is that there may not be ANY DC component.
Two issues there: i) This discussion ( with Austin) was explicitly about DC current spread and what splitting effects there may, or may not be, and their values. ii) You have seen the latest FPGA data sheets :) ? I see the 90nm device from lattice, can draw 1.5 AMPS, at 105'C Tj That's just static Icc. Thus, the latest FPGAs are a long way from your classic CMOS... DC current is there, and at not insignificant levels... -jg
Peter Alfke wrote:

> fpga_toys@yahoo.com wrote: > >>The problem is that there may not be ANY DC component. > > > Well, well. It does not take a genius to find out that all current (or > power) consumption ends up as a (pulsating) DC current through the > chip, from Vcc to ground. > Just imagine the transistors as simple switches, and the loads as > capacitors. When driving High, charge (current) flows in from Vcc. When > driving low, that same charge gets dumped into the ground leads. > I call that dc current. there isn't even any reversal of the current > direction. > Isn't that pretty basic?
Probably dangerously basic, if you are talking with a novice :) An expert would warn the novice that this basic DC current, actually has many elements : - The average value determines the average voltage, via the IR drop. - The RMS value, determines the heating in the PCB traces - The AC component, superimposed on the DC, is what causes the inductive ringing effects, via V = -LdI/dT, and the skin effects, that further increase the resistance... The AC component also determines the decoupling cap sizes, to prevent local short-term supply sag. -jg