SDRAM Reading problem

Hi all, I am new to this group and i am facing one problem regarding
reading from the sdram.
Actually I am accessing sdram indirectly through CPU. So I am writing
write data into the fpga registers and set the wr_start bit, after
completing the write operation wr_start bit will be cleared indicating
write has completed. To verify the data written to sdram i am setting the
read_start and reading immediately and the data is correct. But if i read
after sometime the data i am getting is FFFF FFFF (two 16 bit sdrams). I
am operating sdram (SDR sdram) at 125 Mhz. 
Is this because of auto refresh is not done properly? But i am accessing 3
sdrams on the board. Sometime one the sdram works and remaining  fails.
Can anyone has idea? or require more info to answer.
Thanks in advance.