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ironic Xcell journal 1Q2006 cover art, S3E Starter Kit

Started by Unknown February 23, 2006
Does anyone else find the cover art of the 1Q2006 Xilinx Xcell journal
to be rather ironic, given how much Xilinx likes to trumpet their low
power consumption compared to the other leading brand (e.g., Xilinx
advertisement on page 28 of the same issue)?

I'm still eagerly awaiting the February 2006 availability of the
Spartan-3E starter kit.  Five more days to go, unless it slips again.
Today if I click on the Spartan-3E Starter Kit in the online store,
it takes me to a page declaring:

    A technical problem has interrupted your session. We apologize for
    the inconvenience this has caused you.
"Eric Smith" <eric@brouhaha.com> wrote in message 
news:qhpsldd3is.fsf@ruckus.brouhaha.com...
> Does anyone else find the cover art of the 1Q2006 Xilinx Xcell journal > to be rather ironic, given how much Xilinx likes to trumpet their low > power consumption compared to the other leading brand (e.g., Xilinx > advertisement on page 28 of the same issue)? > > I'm still eagerly awaiting the February 2006 availability of the > Spartan-3E starter kit. Five more days to go, unless it slips again. > Today if I click on the Spartan-3E Starter Kit in the online store, > it takes me to a page declaring: > > A technical problem has interrupted your session. We apologize for > the inconvenience this has caused you.
I got the technical problem some, too, but I didn't get it consistently. The link at the online store for the starter kit info ends in HW-SPAR3E-DK but should end in HW-SPAR3E-SK-US - make that change and you'll see there's now some documentation for the board! Wheeee!!!
Well the boards do physically exist, Silica had one S3e SK board at
Embedded, but the actual shipping is slipping to March, ASFAIK

Antti
PS I did like page 3 on the Schematic! It takes one day to recover
that missing schematic so why even bother hiding it?

Maybe we should get an offering out there. Question is could we get the 
silicon as fast as we can make the board?

John Adair
Enterpoint Ltd. - Home of Hollybush1. The PC104Plus Spartan-3 Development 
Board.
http://www.enterpoint.co.uk

"Eric Smith" <eric@brouhaha.com> wrote in message 
news:qhpsldd3is.fsf@ruckus.brouhaha.com...
> Does anyone else find the cover art of the 1Q2006 Xilinx Xcell journal > to be rather ironic, given how much Xilinx likes to trumpet their low > power consumption compared to the other leading brand (e.g., Xilinx > advertisement on page 28 of the same issue)? > > I'm still eagerly awaiting the February 2006 availability of the > Spartan-3E starter kit. Five more days to go, unless it slips again. > Today if I click on the Spartan-3E Starter Kit in the online store, > it takes me to a page declaring: > > A technical problem has interrupted your session. We apologize for > the inconvenience this has caused you.
well 3 companies are known to be shipping s3e based boards for some
time already, Xilinx seems to be simply delaying what is very strange
as it really hard to belive that other companies are getting Xilinx
silicon earlier than Xilinx himself!!

shipping are
s3-100e based board from Avnet
http://www.cesys.com/index.php?language=en&doc=advanced&docparams=USB3FPGA&menuparams=53
http://www.zefant.de/de/products/index.php

there are possible even more boards already shipping

Antti

If we are going to do anything as a development board it won't be anything 
smaller than the XC3S500E. We are looking at cheap simple small modules for 
hobby use with smaller parts on but a few more boards to deliver before 
those appear. With 2 new development boards launching at DATE and planning 
an aggressive rollout of products for Q2 we have been somewhat busy.

John Adair
Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development 
Board.
http://www.enterpoint.co.uk

"Antti" <Antti.Lukats@xilant.com> wrote in message 
news:1140771268.319428.228280@z34g2000cwc.googlegroups.com...
> well 3 companies are known to be shipping s3e based boards for some > time already, Xilinx seems to be simply delaying what is very strange > as it really hard to belive that other companies are getting Xilinx > silicon earlier than Xilinx himself!! > > shipping are > s3-100e based board from Avnet > http://www.cesys.com/index.php?language=en&doc=advanced&docparams=USB3FPGA&menuparams=53 > http://www.zefant.de/de/products/index.php > > there are possible even more boards already shipping > > Antti >
John_H wrote:
> > The link at the online store for the starter kit info ends in HW-SPAR3E-DK > but should end in HW-SPAR3E-SK-US - make that change and you'll see there's > now some documentation for the board! Wheeee!!! >
I had hopes of doing some wide LVDS testing (14-16 bit) using the S3E board when I first saw the schematics, given the new well-grounded expansion connector, and the soft-touch and unloaded terminators indicating some differential pair routing. Unfortunately, after reviewing the {mirrored} gerbers and schematics, many of the "high speed" I/O connector signals are shared with other LED's and connectors, resulting in huge stubs on those lines, which are routed FPGA -> Hirose Connector -> other stuff, mostly on inner layers ( i.e. can't cut the stub off at the Hirose pad ). There's maybe 7 unencumbered differential pair pins routed to the connector, of which four are input-only pins without LVDS output drivers. Oh well; it's still a good value for the price, I just wish they'd manage to include provisions for high speed I/O one of these years. Brian
In article <1140882498.644680.13880
@e56g2000cwe.googlegroups.com>, brimdavis@aol.com says...

[ ... ]

> I had hopes of doing some wide LVDS testing (14-16 bit) using > the S3E board when I first saw the schematics, given the new > well-grounded expansion connector, and the soft-touch and > unloaded terminators indicating some differential pair routing. > > Unfortunately, after reviewing the {mirrored} gerbers and schematics, > many of the "high speed" I/O connector signals are shared with > other LED's and connectors, resulting in huge stubs on those lines, > which are routed FPGA -> Hirose Connector -> other stuff, mostly on > inner layers ( i.e. can't cut the stub off at the Hirose pad ). > > There's maybe 7 unencumbered differential pair pins routed to the > connector, of which four are input-only pins without LVDS output > drivers. > > Oh well; it's still a good value for the price, I just wish they'd > manage to include provisions for high speed I/O one of these years.
I'm a bit surprised that John Adair didn't reply to this. Take a look at paged 13 and 14 of: http://www.enterpoint.co.uk/moelbryn/RaggedStone_User_Man ual_Issue_1_03.zip It looks like their RaggedStone1 board should let you use 28 LVDS pairs quite easily. They indicate that they've routed the traces to minimize skew on those pairs too. -- Later, Jerry. The universe is a figment of its own imagination.
In article <MPG.1e6d4ae5ad903e029896b8@news.sunsite.dk>, 
jcoffin@taeus.com says...

[ ... ]

> It looks like their RaggedStone1 board should let you use > 28 LVDS pairs quite easily. They indicate that they've > routed the traces to minimize skew on those pairs too.
Oops -- that's 28 pairs per DIL, so the total's actually 56, not 28. -- Later, Jerry. The universe is a figment of its own imagination.
Jerry Coffin wrote:
> > It looks like their RaggedStone1 board should let you use > 28 LVDS pairs quite easily. They indicate that they've > routed the traces to minimize skew on those pairs too. >
I think that's a Spartan3 board, not a 3E Also, the RaggedStone1 headers have 60 pins, one power, one ground If everything's perfectly balanced, that pinout might be OK with low speed differential drivers, but I wouldn't try running any 640 Mbps data through it. Brian