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Need a SPI 4?

Started by freechip February 24, 2006
Hi
I am working on 10 Gb Ethernet project.
I am going to use a NIOS II in a Stratix II or a Stratix GX. I don't know
yet. 
I have seen 2 development boards for this high bandwith.
Normally, the interface SPI (System Packet Interface) is used between the
fpga and a NPU.

I don't use a NPU but a NIOS II in the fpga!
So I think I can choose a development board whose within the SPI is not
supported.

Are you agree with that?
On Fri, 24 Feb 2006 04:40:21 -0600, "freechip" <freechip@hotmail.fr>
wrote:

> >Hi >I am working on 10 Gb Ethernet project. >I am going to use a NIOS II in a Stratix II or a Stratix GX. I don't know >yet. >I have seen 2 development boards for this high bandwith. >Normally, the interface SPI (System Packet Interface) is used between the >fpga and a NPU. > >I don't use a NPU but a NIOS II in the fpga! >So I think I can choose a development board whose within the SPI is not >supported. > >Are you agree with that?
Yes. I know from experience that it is possible to implement 10GbE interfaces without SPI-4. If *I* was designing a 10GbE board, I would use an XFP, a 10GbE SERDES with an XSBI to an FPGA, and avoid the MSA-300 connector that the evaluation boards you mentioned in another thread use. That's me though; your needs may be totally different. MSA-300 would have been a good solution four to five years ago (when 10GbE was young), and may still be a good solution if you don't feel confident working with 10Gb/s serial signals on your board. Yet another option to consider is a XAUI (since this is supported by a fewl FPGA families without needing an external SERDES), however my reading of the market is that XFP will completely replace XAUI. BTW, how do you expect a NIOS II to be able to keep up with sending or receiving almost 30 million packets per second? Regards, Allan