what shall I use to convert FPGA i/o pins to 5v TTL compatible levels? 50 i/o pins, tri-state, TTL R
fpga to 5v ttl logic
Started by ●February 25, 2006
Reply by ●February 25, 20062006-02-25
aiiadict@gmail.com wrote:> what shall I use to convert FPGA i/o pins > to 5v TTL compatible levels?What FPGA? What I/O supply voltage? How fast? A few (older ones mostly) you can directly connect. For some such as spartan 3 you can use series resistors. (Typically ones which have internal protection diodes - the resistor limits the current to prevent burning out the diode, which limits the voltage to the input itself) For others you may want to use special level translators or perhaps 3.3 volt buffers with 5v compatible I/O. Also, what logic family are you using on the 5v side - TTL, 5v CMOS, or 5v TTL-compatible CMOS? Ordinary 5v CMOS may not see 3.3v referenced '1's as '1's - though 5V TTL and TTL compatible CMOS should.
Reply by ●February 25, 20062006-02-25
There are two directions: FPGA to TTL, and TTL to FPGA Today, all the FPGAs I know still support 3.3 V as I/O supply voltage. (That may change in the future, for 3.6-V tolerance is not natural or easy in the best and fastest processes) TTL-to-FPGA: Old bipolar TTL generally stayed 1 or 2 diode drops below Vcc, but CMOS variants can swing all the way to Vcc=5.5Vmax. Most FPGAs do not tolerate >3.6 V on their pins, but most also have a clamp diode to their own Vcc. If you can rely on that diode, then use 2.5 V or 3.3 V as Vccio and put a series resistor of 100 or 220 Ohm between the FPGA and TTL pin, to limit any clamp current. FPGA-to-TTL: Usually no problem, since TTL sees anything above 2.4 V as High. There are, however, "TTL" derivatives with CMOS input thresholds that might be up to 3.5 V. In that case, you should 3-state the FPGA output, and use a pull-up resistor to 5 V (relying on the clamp diode to the 3.3 V Vcco. This is a slow pull-up, and there is a trick to temporarily enable the active pull-up to generate the first 2 V of voltage swing. 5V should today be considered an obsolete and awkward supply voltage, although it has served us well for 40 years.( In a few years, 3.3V will cause the same grief...) Peter Alfke, from home.
Reply by ●February 26, 20062006-02-26
Peter Alfke wrote:> There are two directions: FPGA to TTL, and TTL to FPGA > Today, all the FPGAs I know still support 3.3 V as I/O supply voltage. > (That may change in the future, for 3.6-V tolerance is not natural or > easy in the best and fastest processes) > TTL-to-FPGA: Old bipolar TTL generally stayed 1 or 2 diode drops below > Vcc, but CMOS variants can swing all the way to Vcc=5.5Vmax. Most FPGAs > do not tolerate >3.6 V on their pins, but most also have a clamp diode > to their own Vcc. If you can rely on that diode, then use 2.5 V or 3.3 > V as Vccio and put a series resistor of 100 or 220 Ohm between the FPGA > and TTL pin, to limit any clamp current. > > FPGA-to-TTL: Usually no problem, since TTL sees anything above 2.4 V as > High. There are, however, "TTL" derivatives with CMOS input thresholds > that might be up to 3.5 V. In that case, you should 3-state the FPGA > output, and use a pull-up resistor to 5 V (relying on the clamp diode > to the 3.3 V Vcco. > This is a slow pull-up, and there is a trick to temporarily enable the > active pull-up to generate the first 2 V of voltage swing.There is also a growing range of Dual-Vcc Translators, to service this market that refuses to die... TI has quite a number now, and I see Philips following them. You need dual supply, if power supply drain is any sort of a convern.The Clamp diode tricks above are simple, but do not do good things to the power drain figures.....> 5V should today be considered an obsolete and awkward supply voltage, > although it has served us well for 40 years.( In a few years, 3.3V will > cause the same grief...)Sorry Peter, but much as the FPGA sector wants 5V to go away, it's still here. In fact, the newest devices from Infineon and Freescale have 5V ports ! Yes, they have lower voltage cores, but that is hidden from the designer. ie, the Silicon vendor takes the trouble! ISTR the Freescale one impressed me, as it appeasrs to not need a core decoupling pin - not sure how they managed that. Why ? - noise immunity, ease of interface : have you ever tried to find a power MOSFET that can be driven from 3.3V ? -jg
Reply by ●February 26, 20062006-02-26
Jim Granville wrote:> Sorry Peter, but much as the FPGA sector wants 5V to go away, > it's still here. In fact, the newest devices from Infineon and Freescale > have 5V ports !<snip>> Why ? - noise immunity, ease of interface : have you ever tried to > find a power MOSFET that can be driven from 3.3V ?If building in 5v tolerance for that reason, why not build for say 9 volt or 15 volt? Even 5v gate drive is marginal for power MOSFETs, in that it's only enough for some parts.
Reply by ●February 26, 20062006-02-26
On a sunny day (26 Feb 2006 07:45:40 -0800) it happened cs_posting@hotmail.com wrote in <1140968740.868102.127480@p10g2000cwp.googlegroups.com>:>Jim Granville wrote: > >> Sorry Peter, but much as the FPGA sector wants 5V to go away, >> it's still here. In fact, the newest devices from Infineon and Freescale >> have 5V ports ! ><snip> >> Why ? - noise immunity, ease of interface : have you ever tried to >> find a power MOSFET that can be driven from 3.3V ? > >If building in 5v tolerance for that reason, why not build for say 9 >volt or 15 volt? > >Even 5v gate drive is marginal for power MOSFETs, in that it's only >enough for some parts.Yes but at least you can get these. 3.3 V parts, 1.5 V 100% on, are rare.> >
Reply by ●February 26, 20062006-02-26
Jim Granville wrote:>> Sorry Peter, but much as the FPGA sector wants 5V to go away, > it's still here. In fact, the newest devices from Infineon and Freescale > have 5V ports ! > > Yes, they have lower voltage cores, but that is hidden from the > designer. ie, the Silicon vendor takes the trouble!Yes, it is possible to make modern ICs 5-V tolerant, while the internal logic operatesoff 1 to 1.5 V. But the high Vcc and thick oxide in the I/O circuits severely reduces their speed. And we see far more of our customers clamoring for high performance than for 5-V compatibility. We try to serve a very broad range of customer requirements, but sometimes we have to make a choice. 5-V tolerance was sacrificed for higher I/O performance and lower power. Peter Alfke, Xilinx Applications
Reply by ●February 26, 20062006-02-26
cs_posting@hotmail.com wrote:> Jim Granville wrote: > > >>Sorry Peter, but much as the FPGA sector wants 5V to go away, >>it's still here. In fact, the newest devices from Infineon and Freescale >>have 5V ports ! > > <snip> > >>Why ? - noise immunity, ease of interface : have you ever tried to >>find a power MOSFET that can be driven from 3.3V ? > > > If building in 5v tolerance for that reason, why not build for say 9 > volt or 15 volt?4000 series logic had higher voltage operation, and is still widely used. We still use 4000 series gates in new designs, but choose to operate at 5V, not higher. One of the driving forces :) in the 5V standard is Automotive. Here, 9 and 15V regulated rails are clearly too high, as the canking voltage would cause dropout.> > Even 5v gate drive is marginal for power MOSFETs, in that it's only > enough for some parts.A strange argument for removing it, if that is what you are saying ? There are a raft of TTL compatible MOSFET driver chips, typically SO8, if you really need 10V drive - but a large portion of MOSFETS in use are for relay/Solenoid/Small motor control, where 5V gate drive is fine. Last time I checked, it was really only the "final milliohm" that needed 10V gate drive - eg a Philips PH2625L is 4.5 milliOhms at 4.5V Vgs, and 2.7 MilliOhms at 10V Vgs White and Blue LEDS are another common (and growing) load, that struggles with 3.3V and lower supply rails. You CAN get 3.3V relays (I have a design now that will use 3V relays) but they are not common, and restricted to smaller models. -jg
Reply by ●February 26, 20062006-02-26
Peter Alfke wrote:> But the high Vcc and thick oxide in the I/O circuits severely reduces > their speed. And we see far more of our customers clamoring for high > performance than for 5-V compatibility.It's a relatively small market comparted to new designs, but 5V legacy designs in the field will be around for another decade or so, where speed has never been the issue. The original posters history shows interest in Apple II development, and may be hobby only. On the other hand, there remains 5V industrial development around ISA and PC104, which isn't likely to go completely 3.3V for a while.
Reply by ●February 26, 20062006-02-26
All engineering decisions, and also all business decisions are a trade-off between conflicting goals and requirements. While the two big gorillas in FPGA-land emphasize performance, density, and low cost, perhaps the little guys (used to be affectionally called the "seven dwarfs" but they are fewer than seven now) can populate the niches left empty by the big guys. Might be their one chance... Peter Alfke






