Forums

Altera Cyclone replacement

Started by Stef January 25, 2019
Hi,

We got an old design with an Altera Cyclone FPGA (EP1C12F324).
These are probably obsolete (Can't find any info on them on the Intel
site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV
and Cyclone-V if I understood correctly.

Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of
changes should I expect to code and board? Design includes NIOS.

Or alternatively, are their sources for these old Cyclone chips?
(We actually would need 3 different types :-( )


-- 
Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)

There is never time to do it right, but always time to do it over.
On 25/01/2019 14:58, Stef wrote:
> Hi, > > We got an old design with an Altera Cyclone FPGA (EP1C12F324). > These are probably obsolete (Can't find any info on them on the Intel > site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV > and Cyclone-V if I understood correctly. > > Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of > changes should I expect to code and board? Design includes NIOS. > > Or alternatively, are their sources for these old Cyclone chips? > (We actually would need 3 different types :-( ) > >
Hi Stef, Try www.octopart.com, there are several distributors that still have some types in stock. Good luck, Hans www.ht-lab.com
On 2019-01-25 15:58, Stef wrote:
> Hi, > > We got an old design with an Altera Cyclone FPGA (EP1C12F324). > These are probably obsolete (Can't find any info on them on the Intel > site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV > and Cyclone-V if I understood correctly. > > Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of > changes should I expect to code and board? Design includes NIOS. > > Or alternatively, are their sources for these old Cyclone chips? > (We actually would need 3 different types :-( ) > >
Hi, Are you looking for somebody who can transfer you project from Altera Cyclone to Cyclone V ? If yes, my email is gorskia @ wp.pl. My small R&D company is looking for new customers. Best regards Adam Górski
On Friday, January 25, 2019 at 10:16:04 AM UTC-5, Stef wrote:
> Hi, > > We got an old design with an Altera Cyclone FPGA (EP1C12F324). > These are probably obsolete (Can't find any info on them on the Intel > site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV > and Cyclone-V if I understood correctly. > > Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of > changes should I expect to code and board? Design includes NIOS. > > Or alternatively, are their sources for these old Cyclone chips? > (We actually would need 3 different types :-( ) > > > -- > Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) > > There is never time to do it right, but always time to do it over.
Wow. The original Cyclone family is really old technology. Do you have the source for the design and the Nios? We do a lot of obsolescence respins for customers like this, so yes it is possible. Sometimes it requires *some* redesign to target the appropriate primitives in the newer families, etc. I would not recommend targeting the Cyclone IV as that family is pushing 10 years old now. Cyclone V was released 4-5 years ago and Cyclone 10 is the latest in their "low-cost" portfolio. Given the low logic density of the original design, you might consider the MAX10 instead. Another factor to consider is whether the current design uses the original 16-bit Nios or the 32-bit Nios II. I mention it because a lot of people simply refer to the Nios II as Nios but when we're talking about porting an older design it matters. That may impact how easy it is to port the design.
On Friday, January 25, 2019 at 10:16:04 AM UTC-5, Stef wrote:
> Hi, > > We got an old design with an Altera Cyclone FPGA (EP1C12F324). > These are probably obsolete (Can't find any info on them on the Intel > site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV > and Cyclone-V if I understood correctly. > > Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of > changes should I expect to code and board? Design includes NIOS. > > Or alternatively, are their sources for these old Cyclone chips? > (We actually would need 3 different types :-( )
Unless device specific features were instantiated, there is little to port. The HDL source should compile without issues. There will be a pinout specification file that assigns pin numbers and I/O characteristics which typically is device specific. This will need to be redone, but since the package is changing that's not surprising though, is it? Just be sure to keep the characteristics while changing the pin numbers. There are often sources for old FPGAs. I am still using a Lattice part that was EOL some six years ago. Rick C. - Get 6 months of free supercharging - Tesla referral code - https://ts.la/richard11209
On 2019-01-25 HT-Lab wrote in comp.arch.fpga:
> On 25/01/2019 14:58, Stef wrote: >> Hi, >> >> We got an old design with an Altera Cyclone FPGA (EP1C12F324). >> These are probably obsolete (Can't find any info on them on the Intel >> site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV >> and Cyclone-V if I understood correctly. >> >> Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of >> changes should I expect to code and board? Design includes NIOS. >> >> Or alternatively, are their sources for these old Cyclone chips? >> (We actually would need 3 different types :-( ) >> >> > Hi Stef, > > Try www.octopart.com, there are several distributors that still have > some types in stock.
Okay, didn't expect that to be so easy, gues that's one of the reasons I'm not in purchasing. ;-) Turns out at least small quantities are available from Arrow, Avnet, Mouser, etc. So if we only do one run, this would be sufficient. Thanks. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) Executive ability is prominent in your make-up.
On 2019-01-26 kkoorndyk wrote in comp.arch.fpga:
> On Friday, January 25, 2019 at 10:16:04 AM UTC-5, Stef wrote: >> Hi, >> >> We got an old design with an Altera Cyclone FPGA (EP1C12F324). >> These are probably obsolete (Can't find any info on them on the Intel >> site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV >> and Cyclone-V if I understood correctly. >> >> Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of >> changes should I expect to code and board? Design includes NIOS. >> >> Or alternatively, are their sources for these old Cyclone chips? >> (We actually would need 3 different types :-( ) > > Wow. The original Cyclone family is really old technology.
Indeed! Friday I dug up some datasheets from 2007 and found that a bit old already. But Today I found the correct Intel page and it turns out the original Cyclone was launched in 2002! Suddenly remembered I once played with Cyclone a little. Found the old Cyclone II eval kit in a box. :-)
> Do you have the source for the design and the Nios?
Don't know yet. For now just checking if it's even worth getting it. (always good to have as reference for a new design ofcourse, but for that you do not need a working build environment etc.)
> We do a lot of obsolescence respins for customers like this, so yes it is possible. Sometimes it requires *some* redesign to target the appropriate primitives in the newer families, etc.
Okay sounds promising. How about board design, package, pinout and supply voltages?
> I would not recommend targeting the Cyclone IV as that family is pushing 10 years old now. Cyclone V was released 4-5 years ago and Cyclone 10 is the latest in their "low-cost" portfolio. Given the low logic density of the original design, you might consider the MAX10 instead.
Ah, friday I somehow landed on an Intel page where I only found Cyclone IV and V? Today I found the compte portfolio. ;-) The largest Cyclone had 20k LEs, the smallest Cyclone 10 already has 85k LEs. MAX 10 ranges from 2k to 50k LEs, so should easely fit.
> Another factor to consider is whether the current design uses the original 16-bit Nios or the 32-bit Nios II. I mention it because a lot of people simply refer to the Nios II as Nios but when we're talking about porting an older design it matters. That may impact how easy it is to port the design.
Don't know yet. Just found the word 'Nios' in the docs we have so far. But thanks for the warning. 16-bit Nios is no longer supported? -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) The best cure for insomnia is to get a lot of sleep. -- W. C. Fields
On 2019-01-27 gnuarm.deletethisbit@gmail.com wrote in comp.arch.fpga:
> On Friday, January 25, 2019 at 10:16:04 AM UTC-5, Stef wrote: >> Hi, >> >> We got an old design with an Altera Cyclone FPGA (EP1C12F324). >> These are probably obsolete (Can't find any info on them on the Intel >> site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV >> and Cyclone-V if I understood correctly. >> >> Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of >> changes should I expect to code and board? Design includes NIOS. >> >> Or alternatively, are their sources for these old Cyclone chips? >> (We actually would need 3 different types :-( ) > > Unless device specific features were instantiated, there is little to port. The HDL source should compile without issues. There will be a pinout specification file that assigns pin numbers and I/O characteristics which typically is device specific. This will need to be redone, but since the package is changing that's not surprising though, is it? Just be sure to keep the characteristics while changing the pin numbers. >
Okay, not too hard then (probably ;-) ). But if I read correctly, you don't expect pin compatible devices to exist? So board modifications are inevitable.
> There are often sources for old FPGAs. I am still using a Lattice part that was EOL some six years ago. >
Yes, found a few already thanks to another reply. But I am a little worried about the future proofness of that approach. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) Don't be humble ... you're not that great. -- Golda Meir
On 2019-01-25 Adam Górski wrote in comp.arch.fpga:
> On 2019-01-25 15:58, Stef wrote: >> Hi, >> >> We got an old design with an Altera Cyclone FPGA (EP1C12F324). >> These are probably obsolete (Can't find any info on them on the Intel >> site, Farnell is out of stock, etc.). Currently active are the Cyclone-IV >> and Cyclone-V if I understood correctly. >> >> Is a design from a Cyclone portable to a Cyclone-IV/V? What kind of >> changes should I expect to code and board? Design includes NIOS. >> >> Or alternatively, are their sources for these old Cyclone chips? >> (We actually would need 3 different types :-( ) >> >> > > Hi, > > Are you looking for somebody who can transfer you project from Altera > Cyclone to Cyclone V ?
Not for now, but who knows. Will be to Cyclone 10 or Max 10 then after recent discoveries. ;-) -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) "Gotcha, you snot-necked weenies!" -- Post Bros. Comics
On 2019-01-28 Stef wrote in comp.arch.fpga:
> > The largest Cyclone had 20k LEs, the smallest Cyclone 10 already has 85k > LEs. MAX 10 ranges from 2k to 50k LEs, so should easely fit.
Oops, smallest Cyclone 10 GX is 85k LEs. But then there is Cyclone 10 LP, which starts at 6k LEs, going up to 120k. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) "This generation may be the one that will face Armageddon." -- Ronald Reagan, "People" magazine, December 26, 1985