What is required: - access time - power supply voltage - interface lines Addr/Data/CS What is the oryginal chip? Reagards JarekC U�ytkownik "Stef" <stef33d@yahooI-N-V-A-L-I-D.com.invalid> napisa� w wiadomo�ci news:nnd$093f4a46$3b21e82e@963e990d8e91a0cc... | We have a product that includes a small parallel OTP memory. These devices | get very hard to get and no easy alternative is available that fits in the | very small available space. A PLCC32 EPROM will not fit unfortunately. | Since the memory array is small (256x4 bits), I was thinking this could | easily fit into a CPLD or FPGA. But how to program this? | | The memory is used for calibration data. So in production, the device is | characterized, data block is calculated and programmed. | | Usually you use the vendor tools to generate a bitstream from an HDL | design. But are there options to generate these bitstreams during the | production cycle, in only a few seconds? Something like HDL + DATA = | BITSTREAM. And then burn the resulting bitsream in the device. | | A device like the Lattice ispMACH 4000 seems a possible candidate. | | | -- | Stef (remove caps, dashes and .invalid from e-mail address to reply by mail) | | It's better to burn out than it is to rust.
Replaceme EPROM by CPLD/FPGA
Started by ●March 28, 2019
Reply by ●April 9, 20192019-04-09
Reply by ●April 9, 20192019-04-09
On Thu, 28 Mar 2019 13:28:46 +0100 Stef <stef33d@yahooI-N-V-A-L-I-D.com.invalid> wrote:> We have a product that includes a small parallel OTP memory. [snip] > > A device like the Lattice ispMACH 4000 seems a possible candidate.You seem to be right. I tried a random pattern in a Lattice 4064 part, and in one of the small Xilinx parts, both fitted, but more testing is needed to see what proportion of possible patterns would fit. Part size from 4x4mm BGA to 7x7mm TQFP. Six connections are needed for flashing, could be pins, holes, or pads. If it is a microprocessor system, and you have firmware build access, I would use a 1kx8 I2C eeprom in SOT23-5 package. As others have noted, perhaps there is not enough detail in your spec to suggest optimum solutions. Perhaps you are just doing re- calibration and need to build a pin-compatible solution? Jan Coombs --
Reply by ●May 7, 20192019-05-07
I've done a 27xxx EPROM emulator by simply using a cheap Ebay board with a Cyclone IV and some 74HC buffers. The HDL code can be generated simply by using Octave reading a file and compiling a synthesize-able VHDL file from it's contents. I'm sure it could be possible to create a simple statemachine to fill upp RAM via some UART for dynamic update of contents. Just my 2 cent.
