Virtex 4 deconfiguring itself ...

Hello,

We're currently working on a design running on a Virtex4 SX35. That
design uses most of the resources of the FPGA (around 80% of the slices
and 50% or the BRAMs/multipliers). We're working on the AVNET SX35 kit
with a VGA extension card and a sdram expension card.

Depending of the datafiles we send, sometimes it completly deconfigure
the FPGA ... done goes de-asserted and nothing is processing anymore
...
But that behavior is not deterministric, sometimes it can process for
one minute and then deconfigure, or sometimes it just can't even
process 1 second without crashing ... Apparently the more "heavy" is
the datastream, then faster it will crash.

Anyone would have an idea of what's going on there ?


    Sylvain

Sylvain Munaut <SomeOne@SomeDomain.com> wrote:

> Hello,
> 
> We're currently working on a design running on a Virtex4 SX35. That
> design uses most of the resources of the FPGA (around 80% of the slices
> and 50% or the BRAMs/multipliers). We're working on the AVNET SX35 kit
> with a VGA extension card and a sdram expension card.
> 
> Depending of the datafiles we send, sometimes it completly deconfigure
> the FPGA ... done goes de-asserted and nothing is processing anymore
> ...
> But that behavior is not deterministric, sometimes it can process for
> one minute and then deconfigure, or sometimes it just can't even
> process 1 second without crashing ... Apparently the more "heavy" is
> the datastream, then faster it will crash.
> 
> Anyone would have an idea of what's going on there ?
> 
> 
>     Sylvain
> 
Sounds like your design may be drawing more current than the the power 
supplies can provide.  YOu might try monitoring the FPGA supply voltages.

Ray Andraka wrote:
> Sylvain Munaut <SomeOne@SomeDomain.com> wrote:
>
> > Hello,
> >
> > We're currently working on a design running on a Virtex4 SX35. That
> > design uses most of the resources of the FPGA (around 80% of the slices
> > and 50% or the BRAMs/multipliers). We're working on the AVNET SX35 kit
> > with a VGA extension card and a sdram expension card.
> >
> > Depending of the datafiles we send, sometimes it completly deconfigure
> > the FPGA ... done goes de-asserted and nothing is processing anymore
> > ...
> > But that behavior is not deterministric, sometimes it can process for
> > one minute and then deconfigure, or sometimes it just can't even
> > process 1 second without crashing ... Apparently the more "heavy" is
> > the datastream, then faster it will crash.
> >
> > Anyone would have an idea of what's going on there ?
> >
> >
> >     Sylvain
> >
> Sounds like your design may be drawing more current than the the power
> supplies can provide.  YOu might try monitoring the FPGA supply voltages.

I was thinking along similar lines as well.

-Isaac

Thanks to both of you.

That's what we were thinking and it's what we're investigating ...
indeed that development board seems to have a 'weak' power supply ...