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Use example of Intel University program in Intel Quartus - problem with Board support package?

Started by Bliad Bors March 24, 2020

I want to use a example from the Intel FPGA Monitor Program 18.1 and use it in Quartus 18.1. It is the video example, which creates a blue box on the HDMI output and writes a littel String with white letters on top of it.

I want to use it in Intel Quartus environment , do some test-outputs on my screen and finally add some more Hardware to the Avalon system. Unfortunately it doesnt work for me as i thought xD:

short file overview:
https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwiHq8Ha0bHoAhXOsKQKHUu6DdIQFjAAegQIAxAB&url=ftp%3A%2F%2Fftp.intel.com%2FPub%2Ffpgaup%2Fpub%2FIntel_Material%2F18.1%2FComputer_Systems%2FDE10-Nano%2FDE10-Nano_Computer_NiosII.pdf&usg=AOvVaw1-HoCsnC7Vin21PNHOAsmE

Project File: DE10_Nano_Computer.qpf

QSYS Konfiguration File: Computer_System.sopcinfo

SRAM File : DE10_Nano_Computer.sof

NIOSII Main: video.c

NIOSII library: address_map_nios2.h

Project includes:

DE10-Nano_Computer_NiosII.pdf

I/O Peripheral | Qsys Core

    On-chip memory
    character buffer Character Buffer for Video Display
    SD Card SD Card Interface
    Red LED parallel port Parallel Port
    Expansion parallel ports Parallel Port
    Slider switch parallel port Parallel Port
    Pushbutton parallel port Parallel
    Port JTAG port JTAG UART
    Interval timer Interval timer
    System ID System ID
    Peripheral Audio port Audio
    Video port Pixel Buffer DMA Controller

Test1: Open FPGA Monitor Program 18.1 - create new project - select video example - sof is downloaded on FPGA - compile & load video.c Result: works HDMI shows test-string

Test2: download .sof to FPGA - Eclipse for Nios - new project simple hello world with bsp -work with .sof-put video.c and address_map_nios2.h into project- use video.c as main, Result: works HDMI shows test-string

Test 3: do the same as Test2 , Result: random pixels in the first ~20 lines

Test 4: reinstall FPGA Monitor Program 18.1 do the same as Test2 Result: works HDMI shows test-string

Test 5: do the same like Test2, doesnt work, do the same like Test4 Result: random pixels in the first ~20 lines

Test 6: copy .elf from my FPGA Monitor Program 18.1 software directory into project folder, run this this elf Result: works HDMI shows test-string

Test 7: change something of the video.c of Test 6, Result: works HDMI shows test-string but without the blue box !

Test 8: do the same like Test2 Result: random pixels in the first ~20 lines

Test 9: Check run configurations : select all combinations of processor and byte stream devices Result: random pixels in the first ~20 lines

Test 10: Switch to FPGA Monitor Program 18.1, compile & Load video.c Result: works HDMI shows test-string

Check: Description in https://home.isr.uc.pt/~jfilipe/files/Final_Project_Simplified_Tutorial.pdf ( they do nearly the same...)

Check: Book EMBEDDED SoPC DESIGN WITH NIOS II PROCESSOR AND VERILOG EXAMPLES : They say: BSP Editor will get the sopcinfo file and support you with your access to the Hardware. Without configuring much

Check: Intel BSP documents : hey say: BSP Editor will get the sopcinfo file and support you with your access to the Hardware. Without configuring much

Check: Intel The Nios® II Processor: Hardware Abstraction Layer in youtube: https://www.youtube.com/watch?v=HF7Low_sUig

I suppose that something is wrong eather with my selected sopcinfo or with the BSP. Maybe you can give me some advice, tell me if you need more information ! :) Thank you :D

Here are some screenshots of my development environment:

https://de.scribd.com/document/452954331/Altera-Nios-II-BSP-Summary

https://de.scribd.com/document/452954367/Question-1
On Tuesday, 24 March 2020 17:19:14 UTC+1, Bliad Bors  wrote:
> I want to use a example from the Intel FPGA Monitor Program 18.1 and use it > in Quartus 18.1. It is the video example, which creates a blue box on the > HDMI output and writes a littel String with white letters on top of it. > > I want to use it in Intel Quartus environment , do some test-outputs on my > screen and finally add some more Hardware to the Avalon system. Unfortunately > it doesnt work for me as i thought xD: > > short file overview:
<ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/Computer_Systems/DE10-Nano/DE10-Nano_Computer_NiosII.pdf> <snip> Have you noticed that the document says "For Quartus Prime 17.1"? I.e. I am guessing a version mismatch: in my (admittedly little) experience with Quartus and related, different versions are neither backwards nor forwards compatible. Julio
Am Dienstag, 24. M=C3=A4rz 2020 18:49:42 UTC+1 schrieb Julio Di Egidio:
> On Tuesday, 24 March 2020 17:19:14 UTC+1, Bliad Bors wrote: > > I want to use a example from the Intel FPGA Monitor Program 18.1 and us=
e it
> > in Quartus 18.1. It is the video example, which creates a blue box on t=
he
> > HDMI output and writes a littel String with white letters on top of it. > >=20 > > I want to use it in Intel Quartus environment , do some test-outputs on=
my
> > screen and finally add some more Hardware to the Avalon system. Unfortu=
nately
> > it doesnt work for me as i thought xD: > >=20 > > short file overview: > <ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/Computer_Systems/=
DE10-Nano/DE10-Nano_Computer_NiosII.pdf>
> <snip> >=20 > Have you noticed that the document says "For Quartus Prime 17.1"? I.e. I=
am
> guessing a version mismatch: in my (admittedly little) experience with Qu=
artus
> and related, different versions are neither backwards nor forwards compat=
ible.
>=20 > Julio
Hi yes I only found this ... maybe it is no big difference for this descrip= tion... even the link says: 18.1 ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/Computer_Systems/DE1= 0-Nano/DE10-Nano_Computer_NiosII.pdf :D
Julio Di Egidio <julio@diegidio.name> wrote:
> On Tuesday, 24 March 2020 17:19:14 UTC+1, Bliad Bors wrote: > > I want to use a example from the Intel FPGA Monitor Program 18.1 and use it > > in Quartus 18.1. It is the video example, which creates a blue box on the > > HDMI output and writes a littel String with white letters on top of it. > > > > I want to use it in Intel Quartus environment , do some test-outputs on my > > screen and finally add some more Hardware to the Avalon system. Unfortunately > > it doesnt work for me as i thought xD: > > > > short file overview: > <ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/Computer_Systems/DE10-Nano/DE10-Nano_Computer_NiosII.pdf> > <snip> > > Have you noticed that the document says "For Quartus Prime 17.1"? I.e. I am > guessing a version mismatch: in my (admittedly little) experience with Quartus > and related, different versions are neither backwards nor forwards compatible.
That's right, and it's safer to use the specific version mentioned in a tutorial. However I don't think it makes a big deal in this case - the IP cores haven't changed a lot between versions (Quartus Standard feels like it's on maintenance releases, with all the effort going into Quartus Pro). To the OP, a blind guess it's either: 1) something wrong with the software (.c file) which is writing the wrong data into the framebuffer - for instance it's getting the video format wrong, or it's allocating program data like the stack in memory that happens to be the framebuffer. For example, if the memory is small and you put in extra code into the program the executable would grow in size and it might start spilling into the framebuffer. 2) something wrong with the hardware that's corrupting the pixels being read out. This seems unlikely given the bitfile works for one of the examples. I'd start by investigating 1) as I think that's more likely. Theo
Am Mittwoch, 25. M=C3=A4rz 2020 18:02:13 UTC+1 schrieb Theo:
> Julio Di Egidio <julio@diegidio.name> wrote: > > On Tuesday, 24 March 2020 17:19:14 UTC+1, Bliad Bors wrote: > > > I want to use a example from the Intel FPGA Monitor Program 18.1 and =
use it
> > > in Quartus 18.1. It is the video example, which creates a blue box on=
the
> > > HDMI output and writes a littel String with white letters on top of i=
t.
> > >=20 > > > I want to use it in Intel Quartus environment , do some test-outputs =
on my
> > > screen and finally add some more Hardware to the Avalon system. Unfor=
tunately
> > > it doesnt work for me as i thought xD: > > >=20 > > > short file overview: > > <ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/18.1/Computer_System=
s/DE10-Nano/DE10-Nano_Computer_NiosII.pdf>
> > <snip> > >=20 > > Have you noticed that the document says "For Quartus Prime 17.1"? I.e.=
I am
> > guessing a version mismatch: in my (admittedly little) experience with =
Quartus
> > and related, different versions are neither backwards nor forwards comp=
atible.
>=20 > That's right, and it's safer to use the specific version mentioned in a > tutorial. However I don't think it makes a big deal in this case - the I=
P
> cores haven't changed a lot between versions (Quartus Standard feels like > it's on maintenance releases, with all the effort going into Quartus Pro)=
.
>=20 > To the OP, a blind guess it's either: >=20 > 1) something wrong with the software (.c file) which is writing the wrong > data into the framebuffer - for instance it's getting the video format > wrong, or it's allocating program data like the stack in memory that happ=
ens
> to be the framebuffer. For example, if the memory is small and you put i=
n
> extra code into the program the executable would grow in size and it migh=
t
> start spilling into the framebuffer. >=20 > 2) something wrong with the hardware that's corrupting the pixels being r=
ead
> out. This seems unlikely given the bitfile works for one of the examples=
.
>=20 >=20 > I'd start by investigating 1) as I think that's more likely. >=20 > Theo
Thank you both for your answers :) ------ Ich found by accicent a page on which more current documents are published: https://software.intel.com/en-us/fpga-academic/learn/tutorials They are all for 18.1=20 :D Yes Theo I need to check the software part. Check: I read a bit of ftp://ftp.intel.com/Pub/fpgaup/pub/Teaching_Material= s/current/Tutorials/HAL_tutorial.pdf Because I suspect the Hardware Application Layer is inconsitent It says: HAL has a dir called drivers with src and inc directories. Test 11: Reinstall Intel FPGA Monitor Program - because I had a lot of proj= ects. Wanted to see if I can find the src and inc. Couldn't find them. Test 12: Started a new project in "Intel FPGA Monitor Program" : Type: "Pro= gram with Device Driver Support" , include sample program with the project:= I chose "Video". ( a part ? of the) Project was created in C:\intelFPGA_li= te\18.1\. I saw a folder called BSP. It included the mentioned directories driver with src & inc. Test 13: compared ( just a little bit ) the found BSP directory with the "N= ios II Software Build Tools for Eclipse (Quartus Prime 18.1)" created BSP. = This tool helped me: https://www.diffchecker.com/diff There are little differences ! Test 14: download .sof in FPGA. Create "Nios II Software Build Tools for Ec= lipse (Quartus Prime 18.1)" - new project with BSP. Result: Random pixel .. Test 15: Copied content of BSP directory into the "Nios II Software Build T= ools for Eclipse (Quartus Prime 18.1)" BSP file. Result it worked. Chose NIOS instance 0. byte stream device instance id 0 Test 16: Test 14 & 15 again to see if it was just luck.=20 Result: it worked again. HAL has maybe some problems... Test 17: took a manipulated video.c ( sample file )to test some hdmi output Result worked fine like I would do it with "Intel FPGA Monitor Program" Hmm. now this is nice. But in some days I want to add a input device to my = Hardware system. So the HAL also need to change... but I am really unsure a= t the moment, because it only works with the example HAL xD