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What is wrong with low level code?

Started by Kevin Simonson October 4, 2020
I recently posted a Verilog module to this forum, and someone responded that I was coding at a very low level, which was true; I was referring to XOR gates, NAND gates, NOR gates, and NOT gates. Is there something wrong with writing my code at such a low level? If I have a fairly good understanding of how my algorithm needs to run at such a low level, then what is wrong with writing that kind of low level code?
On Sunday, October 4, 2020 at 8:02:07 PM UTC-4, Kevin Simonson wrote:
> I recently posted a Verilog module to this forum, and someone responded that I was coding at a very low level, which was true; I was referring to XOR gates, NAND gates, NOR gates, and NOT gates. Is there something wrong with writing my code at such a low level? If I have a fairly good understanding of how my algorithm needs to run at such a low level, then what is wrong with writing that kind of low level code?
Nothing wrong with it as such, but it is less efficient and requires a lot of extra typing. When you say you "code at a very low level" I assume you are instantiating gates and wiring them together rather than just inferring gates using logic operators in assignments? If so, you can infer many, many gates with a simple assignment of an expression to a signal like, A <= B AND C; where A, B and C are each vectors or individual signals. I'm not a Verilog user, so I don't know the exact syntax. I want to say the logic operators are symbols rather than words, but it's the same concept. Is this method awkward to you? -- Rick C. - Get 1,000 miles of free Supercharging - Tesla referral code - https://ts.la/richard11209
Kevin Simonson <kvnsmnsn@hotmail.com> wrote:
> I recently posted a Verilog module to this forum, and someone responded > that I was coding at a very low level, which was true; I was referring to > XOR gates, NAND gates, NOR gates, and NOT gates. Is there something wrong > with writing my code at such a low level? If I have a fairly good > understanding of how my algorithm needs to run at such a low level, then > what is wrong with writing that kind of low level code?
It's not wrong, but: 1. It may make your code harder for read, for someone who isn't familiar with its workings. That someone could be yourself if you come back to the code in a decade's time. 2. The task you're trying to do probably doesn't fall naturally into a representation of NAND and NOR gates. So why not enter the problem in its natural state, rather than transform it first in your head? That way there's fewer opportunities for mistakes. 3. It may lull you into a false sense of security, because (unless you're instantiating vendor-specific primitives) the first thing any synthesis tool will do is throw away your gate representation. At which point the assumptions you may bring to your gate representation (eg about gate delays) no longer hold. Theo
On Sunday, October 4, 2020 at 8:02:07 PM UTC-4, Kevin Simonson wrote:
> I recently posted a Verilog module to this forum, and someone responded that I was coding at a very low level, which was true; I was referring to XOR gates, NAND gates, NOR gates, and NOT gates. Is there something wrong with writing my code at such a low level? If I have a fairly good understanding of how my algorithm needs to run at such a low level, then what is wrong with writing that kind of low level code?
Unless the algorithm specification that you're trying to implement is written in terms of such gates, then long term support of that code would be a reason why coding at a low level is 'wrong'. Kevin Jennings