Why Xilinx Ten Gigabit Ethernet PCS/PMA IP Core 32-bit version use less resources than 64-bit version?

The 32-bit version should have better latency performance but I think it's more complex, so it should use more resources. 

But as the link below

https://www.xilinx.com/html_docs/ip_docs/pru_files/ten-gig-eth-pcs-pma.html

32-bit version is better in all kinds of aspects of resource utilization. 

If the 32-bit version has better latency, needs less resource. What's its cost to get these advantages?

I'm totally confused.

On Saturday, July 3, 2021 at 10:13:23 AM UTC+5:30, beyon...@gmail.com wrote:
> The 32-bit version should have better latency performance but I think it's more complex, so it should use more resources. 
> 
> But as the link below 
> 
> https://www.xilinx.com/html_docs/ip_docs/pru_files/ten-gig-eth-pcs-pma.html 
> 
> 32-bit version is better in all kinds of aspects of resource utilization. 
> 
> If the 32-bit version has better latency, needs less resource. What's its cost to get these advantages? 
> 
> I'm totally confused.
Hi,

64-bit data path needs double the registers for pipelining & data outputs compared to 32-bit data path. That would be the reason for increased resources. But, the difference in resources are not in a greater scale as per the Xilinx table in the above link.
With 64-bit interface, the user clock will be half of that of 32-bit version.
I feel that's the big advantage of running the core @ lesser clock frequency compared to 32-bit version.

With Regards,
HP Bhat