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Altera Nios II & PCI Compiler 4.1.0 Question

Started by Sander & Stieneke Odekerken April 11, 2006
Hi,

I'm using SOPC Builder and added some components, including NIOS II,
external RAM and a PCI Host-Bridge (PCI Compiler 4.1.0). Is there, by
coincidence, a reference design available of a system using Nios II and the
PCI Compiler together? I know there is a reference design in the PCI
Compiler User Guide, but it doesn't use the Nios II processor, which I
really need in my design.

Another problem I'm facing is that I can't read/write any information
from/to the configuration space of the internal PCI master/target device or
any other (external) PCI device (actually I didn't tried that because I 
first want to know if it works before I blow up the device :-) ). Should 
configuration be done in VHDL or can
it be done in software? If it is possible using software, do I have to write
to the Avalon bus or directly to the PCI Bus Access slave port? Do you have
any examples or reference of how to do a configuration by software?

Thanks,

Sander Odekerken 


"Sander & Stieneke Odekerken" <sanderA_en_stienekeB@wanadooC.nlD> wrote in message 
news:443be5db$0$117$dbd4d001@news.wanadoo.nl...
> Another problem I'm facing is that I can't read/write any information > from/to the configuration space of the internal PCI master/target device or > any other (external) PCI device (actually I didn't tried that because I first want to know if it > works before I blow up the device :-) ). Should configuration be done in VHDL or can > it be done in software? If it is possible using software, do I have to write > to the Avalon bus or directly to the PCI Bus Access slave port? Do you have > any examples or reference of how to do a configuration by software?
Sander, I presume this is so you can insert a board with a NIOS core into a system that has a PCI bus? The configuration registers are normally initialised by whatever's driving the PCI bus. As an example in a PC when it boots up it walks down the PCI bus detecting devices and allocating memory addresses etc to them. You probably shouldn't be trying to write to these from the other side of the PIC interface. Nial.
The whole system is intended for a quick check if self-made PCI devices 
work.



The goal is to use Nios as the Host processor and to use a PCI Host-Bridge 
to interface Nios to the PCI bus. The board should be working without a PC 
(standalone). This means that the Nios core is the only bus master in the 
system and should do the configuration cycles etc. in software. You can 
interpret this as if I'm making my own mini motherboard, only using PCI.



The software running on the Nios core should walk down the PCI bus to detect 
any attached device and do the rest of the configuration and other 
read/write cycles.



Sander







"Nial Stewart" <nial@nialstewartdevelopments.co.uk> schreef in bericht 
news:4a3rr7Fr53b6U1@individual.net...
> "Sander & Stieneke Odekerken" <sanderA_en_stienekeB@wanadooC.nlD> wrote in > message news:443be5db$0$117$dbd4d001@news.wanadoo.nl... >> Another problem I'm facing is that I can't read/write any information >> from/to the configuration space of the internal PCI master/target device >> or >> any other (external) PCI device (actually I didn't tried that because I >> first want to know if it works before I blow up the device :-) ). Should >> configuration be done in VHDL or can >> it be done in software? If it is possible using software, do I have to >> write >> to the Avalon bus or directly to the PCI Bus Access slave port? Do you >> have >> any examples or reference of how to do a configuration by software? > > > Sander, > > I presume this is so you can insert a board with a NIOS core into a > system that has a PCI bus? > > The configuration registers are normally initialised by whatever's driving > the PCI bus. > > As an example in a PC when it boots up it walks down the PCI bus detecting > devices and allocating memory addresses etc to them. You probably > shouldn't be > trying to write to these from the other side of the PIC interface. > > > > Nial. >