Ethernet Snooping in the FPGA

Hello,
I need to snooping the ethernet data so that corresponding data is send
to corresponding link. I mean one input and two output link (Ethernet).
So only way to implement is to buffer the whole ethernet packet and
look for the VLAN address and send it to the corresponding path?Is
there any other way ? This all need to be implemented in FPGA.

Any help will be great appreciated.
Thanks and regards
Praveen

In comp.arch.fpga pinku <praveenkumar.bm@gmail.com> wrote:
>Hello,
>I need to snooping the ethernet data so that corresponding data is send
>to corresponding link. I mean one input and two output link (Ethernet).
>So only way to implement is to buffer the whole ethernet packet and
>look for the VLAN address and send it to the corresponding path?Is
>there any other way ? This all need to be implemented in FPGA.

100 Mbps _hubs_ comes to mind. They will output the same data to all ports..

pbdelete@spamnuke.ludd.luthdelete.se.invalid wrote:
> In comp.arch.fpga pinku <praveenkumar.bm@gmail.com> wrote:
> 
>>Hello,
>>I need to snooping the ethernet data so that corresponding data is send
>>to corresponding link. I mean one input and two output link (Ethernet).
>>So only way to implement is to buffer the whole ethernet packet and
>>look for the VLAN address and send it to the corresponding path?Is
>>there any other way ? This all need to be implemented in FPGA.
> 
> 
> 100 Mbps _hubs_ comes to mind. They will output the same data to all ports..
> 

I think he wants to say VLAN router

In comp.arch.fpga Aurelian Lazarut <aurash@xilinx.com> wrote:
>pbdelete@spamnuke.ludd.luthdelete.se.invalid wrote:
>> In comp.arch.fpga pinku <praveenkumar.bm@gmail.com> wrote:
>> 
>>>Hello,
>>>I need to snooping the ethernet data so that corresponding data is send
>>>to corresponding link. I mean one input and two output link (Ethernet).
>>>So only way to implement is to buffer the whole ethernet packet and
>>>look for the VLAN address and send it to the corresponding path?Is
>>>there any other way ? This all need to be implemented in FPGA.
>> 
>> 100 Mbps _hubs_ comes to mind. They will output the same data to all ports..

>I think he wants to say VLAN router

Well that's one thing hubs won't do :)

3xPHY + FPGA should be able to fix this. Otoh, maybe a pc can handle it.

pbdelete@spamnuke.ludd.luthdelete.se.invalid wrote:

> 3xPHY + FPGA should be able to fix this. Otoh, maybe a pc can handle it.

Maybe. See:

http://www.ethereal.com/


      -- Mike Treseler