Hi, We have here real good skills in Windows CE software development in our software departement and I was wondering if there was any solution to get an ARM7 or ARM9 core running in a Xilinx FPGA ? Any feedbacks ? Thanks. St�phane.
ARM cores in FPGA ?
Started by ●June 15, 2006
Reply by ●June 15, 20062006-06-15
Hi, Maybe you can consider to go to the FPGA's of ACTEL they have a free ARM core for in there Mixed Signal FPGA: http://www.actel.com/products/arminfusion/ Kind regards, http://www.vhdl.eu "sjulhes" <t@aol.fr> wrote in message news:449152f8$0$29801$626a54ce@news.free.fr...> Hi, > > We have here real good skills in Windows CE software development in our > software departement and I was wondering if there was any solution to get > an ARM7 or ARM9 core running in a Xilinx FPGA ? > > Any feedbacks ? > > Thanks. > > St�phane. >
Reply by ●June 15, 20062006-06-15
Vhdl.eu wrote:> Hi, > > Maybe you can consider to go to the FPGA's of ACTEL they have a free ARM > core for in there Mixed Signal FPGA: > http://www.actel.com/products/arminfusion/ > > Kind regards, > http://www.vhdl.eu >If they are working on WindowsCE development, the Actel FPGA is not a good choice because WindowsCE need a Memory Management Unit. The ARM7 core in Actel FPGA does not provide this feature. St�phane, Does the ARM9 has to be in the FPGA? If it doesn't have to be, you can use an ARM9 Core Tile board http://www.arm.com/products/DevTools/Versatile/CT926EJ-S.html connect to a emulation baseboard http://www.arm.com/products/DevTools/EB.html For additional logic blocks you can add extra FPGA by Logic Tile http://www.arm.com/products/DevTools/LogicTiles.html Joseph This e-mail message is intended for the addressee(s) only and may contain information that is the property of, and/or subject to a confidentiality agreement between the intended recipient(s), their organisation and/or the ARM Group of Companies. If you are not an intended recipient of this e-mail message, you should not read, copy, forward or otherwise distribute or further disclose the information in it; misuse of the contents of this e-mail message may violate various laws in your state, country or jurisdiction. If you have received this e-mail message in error, please contact the originator of this e-mail message via e-mail and delete all copies of this message from your computer or network, thank you.
Reply by ●June 15, 20062006-06-15
"Vhdl.eu" <info@mobile-it.be> schrieb im Newsbeitrag news:44917270$0$10467$ba620e4c@news.skynet.be...> Hi, > > Maybe you can consider to go to the FPGA's of ACTEL they have a free ARM > core for in there Mixed Signal FPGA: > http://www.actel.com/products/arminfusion/ > > Kind regards, > http://www.vhdl.euwhat Actel says "FREE" means 120USD per FPGA for ARM license fee in small qty. the do not want any small customers at all :( Antti
Reply by ●June 15, 20062006-06-15
Antti Lukats wrote:> "Vhdl.eu" <info@mobile-it.be> schrieb im Newsbeitrag > news:44917270$0$10467$ba620e4c@news.skynet.be... >> Hi, >> >> Maybe you can consider to go to the FPGA's of ACTEL they have a free ARM >> core for in there Mixed Signal FPGA: >> http://www.actel.com/products/arminfusion/ >> >> Kind regards, >> http://www.vhdl.eu > > what Actel says "FREE" means 120USD per FPGA for ARM license fee in small > qty. > the do not want any small customers at all :(I've always wondered how much value was in the Actel ARM the whole announcement and strategy has seemed strange to me. I just took a look at the CoreMP7 product brief (http://www.actel.com/documents/CoreMP7_PB.pdf) and on page 5 there is a list of the max MHz and the number of Tiles that the soft core takes up. Max Freq : 22.714 - 29.699 (Depends on device and if debug is supported) Tiles : 6,104 - 8,587 (Depends on device and if debug is supported) Utilization: 26.0% - 99.3% (Depends on device and if debug is supported) This seems to be well below the performance level of a Xilinx MicroBlaze or Altera NIOS-II soft core and extremely below the level of a a Xilinx PowerPC hard core with a much higher area cost. I know that there is niche out there for ARM7 prototypers, but with the performance and area cost does this even come close to a general market need? Ed McGettigan -- Xilinx Inc.
Reply by ●June 15, 20062006-06-15
Ed McGettigan wrote:> I've always wondered how much value was in the Actel ARM the whole > announcement > and strategy has seemed strange to me. I just took a look at the CoreMP7 > product brief (http://www.actel.com/documents/CoreMP7_PB.pdf) and on page 5 > there is a list of the max MHz and the number of Tiles that the soft core > takes up. > > Max Freq : 22.714 - 29.699 (Depends on device and if debug is > supported) > Tiles : 6,104 - 8,587 (Depends on device and if debug is > supported) > Utilization: 26.0% - 99.3% (Depends on device and if debug is > supported) > > This seems to be well below the performance level of a Xilinx MicroBlaze or > Altera NIOS-II soft core and extremely below the level of a a Xilinx > PowerPC > hard core with a much higher area cost. > > I know that there is niche out there for ARM7 prototypers, but with the > performance and area cost does this even come close to a general market > need?Yes, it looks more like a 'marketing tick box', than a compelling engineering argument. You can buy 70MHz ARM uC, with FLASH Code storage, for under $2, and these have quite high performance SSP interfaces - so a system that needs a FPGA ( and not a huge code base) could slave one of these, and save a lot of $$. Larger ARM uC are also available, and normally for about the same price as the FLASH + SDRAM needed to support a FPGA core would be, but with all the high memory bandwidth stuff on one chip - giving large savings in PCB area/layers/EMC. -jg
Reply by ●June 16, 20062006-06-16
Thank you for your answers. But the fact is that in our electronic department we design development kit boards for main ARM processors used with Win CE ( AT91, NADIA, XSCALE, Samsung 2SC2412 and others .. ) and the associated BSP in our software departement. The idea, here in the FPGA department, is to use the power of the Xilinx's System On Chip capabilities, to offer a custom system like the ones designed for the WIN CE platforms. The optimal way would be to have a synthetizable ARM7/9 core to link it to a SOC in the FPGA. Second way would be to find an ARM core with no peripherals in a external chips and connect it to the FPGA. For now I didn't find anything like this. St�phane. "sjulhes" <t@aol.fr> a �crit dans le message de news: 449152f8$0$29801$626a54ce@news.free.fr...> Hi, > > We have here real good skills in Windows CE software development in our > software departement and I was wondering if there was any solution to get > an ARM7 or ARM9 core running in a Xilinx FPGA ? > > Any feedbacks ? > > Thanks. > > St�phane. >
Reply by ●June 16, 20062006-06-16
Ed McGettigan schrieb:> Antti Lukats wrote: > > "Vhdl.eu" <info@mobile-it.be> schrieb im Newsbeitrag > > news:44917270$0$10467$ba620e4c@news.skynet.be... > >> Hi, > >> > >> Maybe you can consider to go to the FPGA's of ACTEL they have a free ARM > >> core for in there Mixed Signal FPGA: > >> http://www.actel.com/products/arminfusion/ > >> > >> Kind regards, > >> http://www.vhdl.eu > > > > what Actel says "FREE" means 120USD per FPGA for ARM license fee in small > > qty. > > the do not want any small customers at all :( > > I've always wondered how much value was in the Actel ARM the whole announcement > and strategy has seemed strange to me. I just took a look at the CoreMP7 > product brief (http://www.actel.com/documents/CoreMP7_PB.pdf) and on page 5 > there is a list of the max MHz and the number of Tiles that the soft core > takes up. > > Max Freq : 22.714 - 29.699 (Depends on device and if debug is supported) > Tiles : 6,104 - 8,587 (Depends on device and if debug is supported) > Utilization: 26.0% - 99.3% (Depends on device and if debug is supported) > > This seems to be well below the performance level of a Xilinx MicroBlaze or > Altera NIOS-II soft core and extremely below the level of a a Xilinx PowerPC > hard core with a much higher area cost. > > I know that there is niche out there for ARM7 prototypers, but with the > performance and area cost does this even come close to a general market > need? > > Ed McGettigan > -- > Xilinx Inc.The 99.3 utilization is for smalles device the plain core does fit in at all, its only for marketing, the core cant actually be used in that device as there is nothing else as the core that fits. The performance is pretty low as of max clock frequency and the FPGA "resource price" is also huge, so yes it does not actually compete with FPGA processors. ASFAIK Actel is only looking for a few big customers, and maybe a few more occasional customers, but for small or medium volume productst the actual costs of the "free" ARM core are way too high. But what I found VERY VERY interesting is the fact that CoreConsole uses SPIRIT XML standard for the IP parametrization and interconnect description. Antti
Reply by ●June 16, 20062006-06-16
sjulhes wrote:> Thank you for your answers. > > But the fact is that in our electronic department we design development kit > boards for main ARM processors used with Win CE ( AT91, NADIA, XSCALE, > Samsung 2SC2412 and others .. ) and the associated BSP in our software > departement. > > The idea, here in the FPGA department, is to use the power of the Xilinx's > System On Chip capabilities, to offer a custom system like the ones > designed for the WIN CE platforms. The optimal way would be to have a > synthetizable ARM7/9 core to link it to a SOC in the FPGA. > > Second way would be to find an ARM core with no peripherals in a external > chips and connect it to the FPGA. > > For now I didn't find anything like this.That seems a slightly strange angle to take, as the peripherals are effectively free. Your main choice is ROMless, or on Chip FLASH : and that is decided by your application. Even the tiny ARM, have fast serial ports, that can connect to FPGA. Larger ones, have external memory interfaces, so you could memory map the FPGA onto those. More pins, and slightly better bandwidth. -jg
Reply by ●June 16, 20062006-06-16
