High speed differential to single ended

Hi,

(This was posted in sci.electronics.design, but I'm reposting it here,
as this might be a more fitting place).

What is the best way to convert a differential DVI signal to single
ended for use in an FPGA? (My FPGA does not support differential I/O)

I was thinking high speed op amp in unity gain, but unsure of this as
I'm not an analog circuit buff.

I also need to take the output ports of the FPGA and convert them to
differential signals. What is the best way to do this?

Thanks, apologies for double post.

vans schrieb:

> Hi,
>
> (This was posted in sci.electronics.design, but I'm reposting it here,
> as this might be a more fitting place).
>
> What is the best way to convert a differential DVI signal to single
> ended for use in an FPGA? (My FPGA does not support differential I/O)
>
> I was thinking high speed op amp in unity gain, but unsure of this as
> I'm not an analog circuit buff.
>
> I also need to take the output ports of the FPGA and convert them to
> differential signals. What is the best way to do this?
>
> Thanks, apologies for double post.

you just cant do DVI with an FPGA without using proper DVI receiver and
transmitter.
.

Antti

vans schrieb:
> Hi,
> 
> (This was posted in sci.electronics.design, but I'm reposting it here,
> as this might be a more fitting place).
> 
> What is the best way to convert a differential DVI signal to single
> ended for use in an FPGA? (My FPGA does not support differential I/O)
> 
> I was thinking high speed op amp in unity gain, but unsure of this as
> I'm not an analog circuit buff.

First, there are dedicaded differential to single ended converter ICs.
Second, they wont work at thoses DVI speeds (370 Mbit/s??).

> I also need to take the output ports of the FPGA and convert them to
> differential signals. What is the best way to do this?

Same procedure as above. Use dedicatd tranceiver ICs. But they must 
support the speed (which most ICs dont).

Regards
Falk

Why Not?

I don't need to decode the TMDS data.

And, even if I did, the algorithm is pretty straightforward.

Antti wrote:
> vans schrieb:
>
> > Hi,
> >
> > (This was posted in sci.electronics.design, but I'm reposting it here,
> > as this might be a more fitting place).
> >
> > What is the best way to convert a differential DVI signal to single
> > ended for use in an FPGA? (My FPGA does not support differential I/O)
> >
> > I was thinking high speed op amp in unity gain, but unsure of this as
> > I'm not an analog circuit buff.
> >
> > I also need to take the output ports of the FPGA and convert them to
> > differential signals. What is the best way to do this?
> >
> > Thanks, apologies for double post.
>
> you just cant do DVI with an FPGA without using proper DVI receiver and
> transmitter.
> .
> 
> Antti

vans schrieb:
> Why Not?
> 
> I don't need to decode the TMDS data.

So why would you feed the DVI into a FPGA?

Regards
Falk

I need to just rearrange pixels. I don't care at all of their values.

The 10 bit TMDS link contains 10 bits, 8 for pixel data, 2 for control.

I just need to rearrange pixels from different links, for a proprietary
lcd display.

The pixel clock on DVI is max 150MHz, any decent high speed op amp can
easily handle that.


Falk Brunner wrote:
> vans schrieb:
> > Why Not?
> >
> > I don't need to decode the TMDS data.
> 
> So why would you feed the DVI into a FPGA?
> 
> Regards
> Falk

vans schrieb:
> I need to just rearrange pixels. I don't care at all of their values.
> 
> The 10 bit TMDS link contains 10 bits, 8 for pixel data, 2 for control.
> 
> I just need to rearrange pixels from different links, for a proprietary
> lcd display.
> 
> The pixel clock on DVI is max 150MHz, any decent high speed op amp can
> easily handle that.

So go for the dedicaded converters (DVI is LVDS I guess). There are 
LVDS-CMOS converters.

Regards
Falk

vans wrote:
> I need to just rearrange pixels. I don't care at all of their values.
>
> The 10 bit TMDS link contains 10 bits, 8 for pixel data, 2 for control.

Not really control but more like parity/encoding format bits. You
probably know this but other people might be confused since the four
links in an interface are R, G, B and "control".

> I just need to rearrange pixels from different links, for a proprietary
> lcd display.

This sounds vaguely like you just want to multiplex video streams. That
would be simple, but anything else is probably more complicated than
you are imagining.

> The pixel clock on DVI is max 150MHz, any decent high speed op amp can
> easily handle that.

But each pixel has to shoot ten bits through the wires, as you said
above. That is 1.5Gbps or 750MHz worst case frequency. Both your op
amps and your FPGAs will have trouble coping with that.

-- Jecel

Falk Brunner schrieb:
> vans schrieb:

>> What is the best way to convert a differential DVI signal to single
>> ended for use in an FPGA? (My FPGA does not support differential I/O)
>>
>> I was thinking high speed op amp in unity gain, but unsure of this as
>> I'm not an analog circuit buff.
> 
> 
> First, there are dedicaded differential to single ended converter ICs.
> Second, they wont work at thoses DVI speeds (370 Mbit/s??).
They can:
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3606
Note that your signal loading probably is lower than the worst case spec
in the datasheet, so you can reliably overclock.

I do not know much about DVI. But if it has a DC-balanced encoding you
could also AC couple to a single ended input with sufficiently low
voltage swing. (e.g. GTL) You only need a capacitor and a resistor per
pin. Of course you lose the noise immunity of LVDS in the process.

Kolja Sulimma

Please excuse an uninformed question:

HDTV has roughly 2 million pixels times 60 Hz = >120 million pixels per
second
Each pixel uses 24 bits. That's a traffic of roughly 3 gigabits per
second.

How do you handle this? how many bits and device pins in parallel ?

Peter Alfke, getting lost in the 3-letter acronyms.
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