stimulus for FPGA

I am planning on buying either a Xilinx Spartan or Altera Development
Kit to test out some designs on FPGA. (I am New to FPGAs).

Question:

Once the design has been downloaded into the FPGA, how do I apply
stimulus and test the design? I believe several methods are possible,
but I would like one where both the stimulus (is applied in) and the
response (is checked) using a high level language like C or C++.
Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
That way I can write C or C++ code to run a real "app".

anand wrote:

> Once the design has been downloaded into the FPGA, how do I apply
> stimulus and test the design?

It's best to test the code before you synthesize it.
You don't even need a development board for this.
Just a text editor and a simulator.

> I believe several methods are possible,
> but I would like one where both the stimulus (is applied in) and the
> response (is checked) using a high level language like C or C++.
> Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?

A simulation testbench that you write
in vhdl or verilog will wiggle and watch the pins
logically, not physically.

> That way I can write C or C++ code to run a real "app".

No. The C API is for simulation too,
but you won't need it to start out.

           -- Mike Treseler

anand wrote:

> Once the design has been downloaded into the FPGA, how do I apply
> stimulus and test the design? I believe several methods are possible,
> but I would like one where both the stimulus (is applied in) and the
> response (is checked) using a high level language like C or C++.
> Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
> That way I can write C or C++ code to run a real "app".

An FPGA is no different in this respect to any other piece of hardware 
you may design. So there is no software "API" to interface to an FPGA 
any more than there are APIs to interface to a 74LS02 or a LED.

You may be getting confused with *simulation*, which does not involve 
programming a physical FPGA but instead simulating the behaviour of your 
FPGA code in software. Stimulus can be provided in several manners and 
with many different languages, including C/C++.

Alternatively, you need to interface your FPGA to a PC via whatever 
means is suitable to the task, from a PCIe/PCI connector down to a 
serial port. Exactly how you interface in software is very dependent on 
the hardware interface method you choose.

Another alternative I've just thought of involves using a soft-core 
processor inside the FPGA to interface with the core logic, enabling you 
to write stimulus in C. That brings a whole number of new issues, not 
the least of which is the requirement for a much larger FPGA and perhaps 
more RAM than would otherwise be required.

Regards,

-- 
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266

If you are new to FPGA, probably new to VHDL and Digital Design.

I hope you get some good references in Digital Systems, Synchronous
design and Synthesizable VHDL (google, the Great Library). You won=B4t
regret studying this and things will sound a lot more familiar...

Regards,

Ricardo

anand escreveu:

> I am planning on buying either a Xilinx Spartan or Altera Development
> Kit to test out some designs on FPGA. (I am New to FPGAs).
>
> Question:
>
> Once the design has been downloaded into the FPGA, how do I apply
> stimulus and test the design? I believe several methods are possible,
> but I would like one where both the stimulus (is applied in) and the
> response (is checked) using a high level language like C or C++.
> Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
> That way I can write C or C++ code to run a real "app".

So in the case, how do real applications actually run (in the customer
environment) when it is downloaded onto an FPGA?



Mark McDougall wrote:
> anand wrote:
>
> > Once the design has been downloaded into the FPGA, how do I apply
> > stimulus and test the design? I believe several methods are possible,
> > but I would like one where both the stimulus (is applied in) and the
> > response (is checked) using a high level language like C or C++.
> > Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
> > That way I can write C or C++ code to run a real "app".
>
> An FPGA is no different in this respect to any other piece of hardware
> you may design. So there is no software "API" to interface to an FPGA
> any more than there are APIs to interface to a 74LS02 or a LED.
>
> You may be getting confused with *simulation*, which does not involve
> programming a physical FPGA but instead simulating the behaviour of your
> FPGA code in software. Stimulus can be provided in several manners and
> with many different languages, including C/C++.
>
> Alternatively, you need to interface your FPGA to a PC via whatever
> means is suitable to the task, from a PCIe/PCI connector down to a
> serial port. Exactly how you interface in software is very dependent on
> the hardware interface method you choose.
>
> Another alternative I've just thought of involves using a soft-core
> processor inside the FPGA to interface with the core logic, enabling you
> to write stimulus in C. That brings a whole number of new issues, not
> the least of which is the requirement for a much larger FPGA and perhaps
> more RAM than would otherwise be required.
>
> Regards,
>
> --
> Mark McDougall, Engineer
> Virtual Logic Pty Ltd, <http://www.vl.com.au>
> 21-25 King St, Rockdale, 2216
> Ph: +612-9599-3255 Fax: +612-9599-3266

Mike Treseler wrote:

>> Once the design has been downloaded into the FPGA, how do I apply
>> stimulus and test the design?
> 
> It's best to test the code before you synthesize it.
> You don't even need a development board for this.
> Just a text editor and a simulator.
> 
>> I believe several methods are possible,
>> but I would like one where both the stimulus (is applied in) and the
>> response (is checked) using a high level language like C or C++.
>> Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
> 
> A simulation testbench that you write
> in vhdl or verilog will wiggle and watch the pins
> logically, not physically.

Let me add: After the simulation tests the real hardware tests at the 
FPGA have to be done either using some pins and applying the stimuli 
from another device, like a personal computer or using a synthesized 
testbench, that has to be build additionally to the design.


Ralf

anand wrote:
> So in the case, how do real applications actually run (in the customer
> environment) when it is downloaded onto an FPGA?

There are no applications.
There are only gates and flops.

         -- Mike Treseler

In article <1151084296.046232.309590@m73g2000cwd.googlegroups.com>,
 "anand" <writeanand@gmail.com> writes:
>So in the case, how do real applications actually run (in the customer
>environment) when it is downloaded onto an FPGA?

The FPGA is connected to real hardware.

Start with something simple.  Use push-buttons for input and LEDs
for output.  Can you blink the LED?  Can you change the blink pattern
when you push the button?

A scope on an output pin (or several of them) is a pretty good
test case.

Most development boards include various IO gear.  Take a look
at the documentation for the boards you are considering and see
what sort of toy you could make.

-- 
The suespammers.org mail server is located in California.  So are all my
other mailboxes.  Please do not send unsolicited bulk e-mail or unsolicited
commercial e-mail to my suespammers.org address or any of my other addresses.
These are my opinions, not necessarily my employer's.  I hate spam.

Yes (Ralf). That is precisely what I am looking for - How can I apply
stimulus from a PC?.
Can you give me some examples of how the PC can interface to the FPGA?

Ralf Hildebrandt wrote:

> Let me add: After the simulation tests the real hardware tests at the
> FPGA have to be done either using some pins and applying the stimuli
> from another device, like a personal computer or using a synthesized
> testbench, that has to be build additionally to the design.
> 
> 
> Ralf

"anand" <writeanand@gmail.com> wrote in message 
news:1151019005.013194.112220@i40g2000cwc.googlegroups.com...
>I am planning on buying either a Xilinx Spartan or Altera Development
> Kit to test out some designs on FPGA. (I am New to FPGAs).
>
> Question:
>
> Once the design has been downloaded into the FPGA, how do I apply
> stimulus and test the design? I believe several methods are possible,
> but I would like one where both the stimulus (is applied in) and the
> response (is checked) using a high level language like C or C++.

> Are there any C/C++ "APIs" that allow the FPGA pins to be "wiggled"?
> That way I can write C or C++ code to run a real "app".
>

To be precise :-) yes you can use a C API to talk to your design without 
using external stimuli/logic analyser etc. However, this is not commonly 
done and will mean extra $$$. I would however follow Mike's advice to first 
test your design to death using a testbench before downloading it to your 
FPGA. Using a simulator is a much better environment than debugging the 
actual hardware.

To answer the precise remark, you can use a product called Dialite from 
Temento (there are probably others as well) to add stimuli and monitor 
instruments (small synthesizable blocks) around your core. You then use the 
JTAG/Custom port + supplied C API (or Tcl and Perl) to drive the stimuli and 
to read the monitor instruments. Thus in effect you have virtual hardware 
environment around your core connected to a C API.

Hans
www.ht-lab.com