no ram core simulation with free Ise ?

wich kind of simulator should i download or purchase for include in
simulation the ram genarated with core generator?thanks

I am sure someone will correct me if I am wrong, but I think that the
free ModelSim XE will simulate core-generated RAM if you have all the
correct (and free) libraries installed.  I am using the free versions
of all the ISE stuff including ModelSim XE and have successfully
simulated designs with core-generated RAM.  Check on the Xilinx site
for the correct versions of the simulation libraries and you should be
OK.

Joey

blisca wrote:
> wich kind of simulator should i download or purchase for include in
> simulation the ram genarated with core generator?thanks

thank  you, joey ,now i have some hope!

Joseph <joeylrios@gmail.com> wrote in message
1151287570.550042.204430@r2g2000cwb.googlegroups.com...
> I am sure someone will correct me if I am wrong, but I think that the
> free ModelSim XE will simulate core-generated RAM if you have all the
> correct (and free) libraries installed.  I am using the free versions
> of all the ISE stuff including ModelSim XE and have successfully
> simulated designs with core-generated RAM.  Check on the Xilinx site
> for the correct versions of the simulation libraries and you should be
> OK.
>
> Joey
>
> blisca wrote:
> > wich kind of simulator should i download or purchase for include in
> > simulation the ram genarated with core generator?thanks
>

I.e . failed to access  library 'xilinxcorelib' at "xilinxcorelib"

i ask,where is the path used for searching?in modelsim.ini?

what does it means this sintax?

verilog = $MODELTECH/../verilog

what are the dots about?and  why slash is used?normally a path is indicated
using backslashes


thank you

blisca wrote:
> I.e . failed to access  library 'xilinxcorelib' at "xilinxcorelib"

The xilinxcorelib is located in $XILINX/verilog/src/XilinxCoreLib/, 
assuming you are using verilog. There is a corresponding VHDL version 
available.

> 
> i ask,where is the path used for searching?in modelsim.ini?

I am not really familiar with how things are done in verilog. Hopefully 
someone will mention if there is a better way. The one time I used it, I 
created a compilation file, pmc_tb.f, that contained all the sources, 
that looked like:

+licq_all+
+access+r

../tb/bd_top.v
../tb/bd_test.v
../tb/dumb_targ64.v
../source/pcim_top.v
../source/cfg_pmc.v

+libext+.vmd+.v
-y $XILINX/verilog/src/unisims
-y $XILINX/verilog/src/simprims

Then I compiled with the statement "vlog -f pmc_tb.f". That can be 
included in a modelsim "do file".


> 
> what does it means this syntax?
> 
> verilog = $MODELTECH/../verilog

To start out with, notice that the modelsim.ini file is divided into 
sections, each with a header enclosed in brackets []. The first section, 
with that verilog line, is included in the [Library] section. As far as 
I know, the library section is only used by VHDL code, though I am not 
sure what that verilog line is used for. VHDL has a concept of libraries 
that seems to be different from Verilog. I am mainly familiar with VHDL.

> 
> what are the dots about?and  why slash is used?normally a path is indicated
> using backslashes

The Xilinx software was originally written for and only available on 
Unix machines, where a forward slash is used as a path separator. The 
double dots mean the same as on Windows; that is, move up one level in 
the directory structure.

It is fairly obvious to those who have used the Xilinx software for many 
years that the core tools have a lot of common code between the Windows 
and Unix/Linux versions, and the GUIs are mainly wrappers around these 
core tools. This has the added advantage that you really don't need to 
use the GUIs if you don't want. All the processing can be done at the 
command line, or with batch files, or makefiles, or any other way desired.

"blisca" <blisca@tiscali.it> wrote in message
news:449fffdb$0$16939$4fafbaef@reader4.news.tin.it...
> I.e . failed to access  library 'xilinxcorelib' at "xilinxcorelib"
>
> i ask,where is the path used for searching?in modelsim.ini?

Read the Modelsim manual.

> what does it means this sintax?
> verilog = $MODELTECH/../verilog

MODELTECH is an environment variable. It usually points to the directory
containing the Modelsim binaries.

> what are the dots about?

.. = up one directory, because the libraries will usually be in a directory
parallel to the binary files, not in a subdirectory.

> and  why slash is used?normally a path is indicated
> using backslashes

No, that's just Windows. The rest of the world uses forward-slashes for path
separators. Modelsim was originally a UNIX app and as such uses UNIX
conventions all over the place.

    -Ben-

thank you very much for the extended answer
Duane Clark <junkmail@junkmail.com> wrote in message
UMTng.73159$4L1.41875@newssvr11.news.prodigy.com...
> blisca wrote:
> > I.e . failed to access  library 'xilinxcorelib' at "xilinxcorelib"
>
> The xilinxcorelib is located in $XILINX/verilog/src/XilinxCoreLib/,
> assuming you are using verilog. There is a corresponding VHDL version
> available.
>
> >
> > i ask,where is the path used for searching?in modelsim.ini?
>
> I am not really familiar with how things are done in verilog. Hopefully
> someone will mention if there is a better way. The one time I used it, I
> created a compilation file, pmc_tb.f, that contained all the sources,
> that looked like:
>
> +licq_all+
> +access+r
>
> ../tb/bd_top.v
> ../tb/bd_test.v
> ../tb/dumb_targ64.v
> ../source/pcim_top.v
> ../source/cfg_pmc.v
>
> +libext+.vmd+.v
> -y $XILINX/verilog/src/unisims
> -y $XILINX/verilog/src/simprims
>
> Then I compiled with the statement "vlog -f pmc_tb.f". That can be
> included in a modelsim "do file".
>
>
> >
> > what does it means this syntax?
> >
> > verilog = $MODELTECH/../verilog
>
> To start out with, notice that the modelsim.ini file is divided into
> sections, each with a header enclosed in brackets []. The first section,
> with that verilog line, is included in the [Library] section. As far as
> I know, the library section is only used by VHDL code, though I am not
> sure what that verilog line is used for. VHDL has a concept of libraries
> that seems to be different from Verilog. I am mainly familiar with VHDL.
>
> >
> > what are the dots about?and  why slash is used?normally a path is
indicated
> > using backslashes
>
> The Xilinx software was originally written for and only available on
> Unix machines, where a forward slash is used as a path separator. The
> double dots mean the same as on Windows; that is, move up one level in
> the directory structure.
>
> It is fairly obvious to those who have used the Xilinx software for many
> years that the core tools have a lot of common code between the Windows
> and Unix/Linux versions, and the GUIs are mainly wrappers around these
> core tools. This has the added advantage that you really don't need to
> use the GUIs if you don't want. All the processing can be done at the
> command line, or with batch files, or makefiles, or any other way desired.

blisca wrote:
> sadly vcom is not able to find xilinxcorelib
> in modelsim xe workspace i can read in the second row
> vhdl                library  C:/xilinx... and so on ,the path where the
> xilinxcore lib really is
> 

Are you using Verilog or VHDL?

sadly vcom is not able to find xilinxcorelib
in modelsim xe workspace i can read in the second row
vhdl                library  C:/xilinx... and so on ,the path where the
xilinxcore lib really is

it is honest to suppose tha the vcon compilator will search for the library
exactly and only here?

if i click on the "+" symbol to expand it i can see a tree of entities (a
blue "E" in a white square)starting with

addr_gen_v3

iis it correct?thank you again

i hope this could be usefule for other newbies

blisca wrote:
> Duane Clark <junkmail@junkmail.com> wrote in message
> FxUng.53669$fb2.51470@newssvr27.news.prodigy.net...
>> blisca wrote:
>>> sadly vcom is not able to find xilinxcorelib
>>> in modelsim xe workspace i can read in the second row
>>> vhdl                library  C:/xilinx... and so on ,the path where the
>>> xilinxcore lib really is
>>>
>> Are you using Verilog or VHDL?
> 
> 
> i'm using vhdl

Then in the [Library] section, you need a line like:
xilinxcorelib = $XILINX/vhdl/src/XilinxCoreLib/work

But before that will work, you need to actually compile the 
xilinxcorelib sources. There is a tool/script for that somewhere, 
included with the Xilinx tools. I haven't used the Xilinx supplied tool 
for compiling it, though. I do it manually, by creating a work directory:
vlib work
and then compiling the source:
vcom prims_constants_v4_0.vhd
vcom c_dist_mem_v5_0_comp.vhd
vcom blkmemdp_pkg_v4_0.vhd
vcom blkmemdp_v4_0_comp.vhd
...etc

But for someone doing it the first time, you should probably find and 
use the tool. Go to the xilinx website, and type xilinxcorelib into the 
search box, and for me, the second link shows how to compile those 
libraries.