We have mentioned Tarfessock1 before and now at the last point where we can add features for the board. You know have the last chance to ask for things you might want in this Cardbus format card so do ask. Currently the spec on the card is as follows: Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), Device2 programmable from Device1 or SPI prom. Device 2 = XC3S1200 or XC3S1600 4 ch DAC 8 ch A/D O/P JTAG - looks like parallel port + cable3 for programming outside target boards. Supported by Device1. 1 serial RS232 interface outside world for MicroBlaze support etc. 1 internal serial (TTL) also possible to Device2. 4 ch RS485 serial controllable half duplex. SDRAM + second SPI Flash on Device2 Approx 70 5V tolerant I/O to outside world. Switched 3.3V O/P to supported external modules that don't need to be powered all the time (i.e. for running in the wild on laptop battery etc). We are using a 120 pin connector to support all these features and there will be breakout board/s available to better pitches. We are currently still on schedule for a September launch. John Adair Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus Development Board. http://www.enterpoint.co.uk
Last Chance for Tarfessock1 Features
Started by ●July 20, 2006
Reply by ●July 20, 20062006-07-20
John Adair wrote:> .... Currently the spec on the card is as follows: > > Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), > Device2 programmable from Device1 or SPI prom. > Device 2 = XC3S1200 or XC3S1600.....> SDRAM + second SPI Flash on Device2All that fits on a cardbus card?? :-) What size, speed, and buswidth of the SDRAM? The ideal would be the largest RLDRAM-II device possible, but failing that, as large and fast as possible. Any price estimates yet? Regards, Tommy
Reply by ●July 20, 20062006-07-20
Hi - I don't know if anyone else has mentioned it, but please make sure you have lots of grounds, well spread out, on the external module connector(s). Bob Perlman Cambrian Design Works http://www.cambriandesign.com On Thu, 20 Jul 2006 10:48:42 +0100, "John Adair" <removethisthenleavejea@replacewithcompanyname.co.uk> wrote:>We have mentioned Tarfessock1 before and now at the last point where we can >add features for the board. You know have the last chance to ask for things >you might want in this Cardbus format card so do ask. Currently the spec on >the card is as follows: > >Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), >Device2 programmable from Device1 or SPI prom. >Device 2 = XC3S1200 or XC3S1600 >4 ch DAC >8 ch A/D >O/P JTAG - looks like parallel port + cable3 for programming outside target >boards. Supported by Device1. >1 serial RS232 interface outside world for MicroBlaze support etc. 1 >internal serial (TTL) also possible to Device2. >4 ch RS485 serial controllable half duplex. >SDRAM + second SPI Flash on Device2 >Approx 70 5V tolerant I/O to outside world. >Switched 3.3V O/P to supported external modules that don't need to be >powered all the time (i.e. for running in the wild on laptop battery etc). > >We are using a 120 pin connector to support all these features and there >will be breakout board/s available to better pitches. > >We are currently still on schedule for a September launch. > >John Adair >Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus >Development Board. >http://www.enterpoint.co.uk >
Reply by ●July 21, 20062006-07-21
Web page with block diagram and outline spec is now on website here http://www.enterpoint.co.uk/moelbryn/tarfessock1.html. John Adair Enterpoint Ltd. John Adair wrote:> We have mentioned Tarfessock1 before and now at the last point where we can > add features for the board. You know have the last chance to ask for things > you might want in this Cardbus format card so do ask. Currently the spec on > the card is as follows: > > Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), > Device2 programmable from Device1 or SPI prom. > Device 2 = XC3S1200 or XC3S1600 > 4 ch DAC > 8 ch A/D > O/P JTAG - looks like parallel port + cable3 for programming outside target > boards. Supported by Device1. > 1 serial RS232 interface outside world for MicroBlaze support etc. 1 > internal serial (TTL) also possible to Device2. > 4 ch RS485 serial controllable half duplex. > SDRAM + second SPI Flash on Device2 > Approx 70 5V tolerant I/O to outside world. > Switched 3.3V O/P to supported external modules that don't need to be > powered all the time (i.e. for running in the wild on laptop battery etc). > > We are using a 120 pin connector to support all these features and there > will be breakout board/s available to better pitches. > > We are currently still on schedule for a September launch. > > John Adair > Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus > Development Board. > http://www.enterpoint.co.uk
Reply by ●July 21, 20062006-07-21
We think this all going to fit but certainly will be very tight. I will know more in few days when placement is more complete. SDRAM is likely to be DDR2 as we are using that on a number of boards but still not fully decided. DDR2 needs 2 more power supplies and hence board space. We make decision when we see how placement works out. Fallback position is SDRAM. John Adair Enterpoint Ltd. Tommy Thorn wrote:> John Adair wrote: > > .... Currently the spec on the card is as follows: > > > > Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), > > Device2 programmable from Device1 or SPI prom. > > Device 2 = XC3S1200 or XC3S1600 > ..... > > SDRAM + second SPI Flash on Device2 > > All that fits on a cardbus card?? :-) > > What size, speed, and buswidth of the SDRAM? The ideal would be the > largest RLDRAM-II device possible, but failing that, as large and fast > as possible. > > Any price estimates yet? > > Regards, > Tommy
Reply by ●July 21, 20062006-07-21
Bob Probably won't be as many as desireable but the option of using virual grounds using switched FPGA I/Os will be possible. I will also see if we can make any build options to hard ground what are I/O pins via solder bridge or 0201 resistor etc. Generally we could use a few I/O than we have available on the 120 way connector currently pencilled in but the next size up standard connector is 180 way and is a bit big physically for the card edge. Generally we are trying to an internal standard for what might be developed as future products beyond Tarfessock1. If we get a good response to this card it likely we will do a big brother version in Virtex-5 but that is only one of many projects competing for team time in Q4 and not guaranteed to happen as yet. John Adair Enterpoint Ltd. Bob Perlman wrote:> Hi - > > I don't know if anyone else has mentioned it, but please make sure you > have lots of grounds, well spread out, on the external module > connector(s). > > Bob Perlman > Cambrian Design Works > http://www.cambriandesign.com > > > On Thu, 20 Jul 2006 10:48:42 +0100, "John Adair" > <removethisthenleavejea@replacewithcompanyname.co.uk> wrote: > > >We have mentioned Tarfessock1 before and now at the last point where we can > >add features for the board. You know have the last chance to ask for things > >you might want in this Cardbus format card so do ask. Currently the spec on > >the card is as follows: > > > >Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface etc), > >Device2 programmable from Device1 or SPI prom. > >Device 2 = XC3S1200 or XC3S1600 > >4 ch DAC > >8 ch A/D > >O/P JTAG - looks like parallel port + cable3 for programming outside target > >boards. Supported by Device1. > >1 serial RS232 interface outside world for MicroBlaze support etc. 1 > >internal serial (TTL) also possible to Device2. > >4 ch RS485 serial controllable half duplex. > >SDRAM + second SPI Flash on Device2 > >Approx 70 5V tolerant I/O to outside world. > >Switched 3.3V O/P to supported external modules that don't need to be > >powered all the time (i.e. for running in the wild on laptop battery etc). > > > >We are using a 120 pin connector to support all these features and there > >will be breakout board/s available to better pitches. > > > >We are currently still on schedule for a September launch. > > > >John Adair > >Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus > >Development Board. > >http://www.enterpoint.co.uk > >
Reply by ●July 21, 20062006-07-21
Not enough grounds is a serious problem for good, high speed design. If there's a decent job done with differential routing for LVDS pairs (and LVDS voltage banks) then the demands on the grounds are lighter, allowing both a slow-speed, many I/O solution *and* a high-speed solution. The Spartan3E Starter kit had more than a dozen differential pairs but only about 4 pairs were "usable" because the others shared signals with LEDs or test headers that left huge stubs. If you did a good job with differential pairs, the speed might be pushed through the development connector. "John Adair" <g1@enterpoint.co.uk> wrote in message news:1153470659.303728.303030@75g2000cwc.googlegroups.com...> Bob > > Probably won't be as many as desireable but the option of using virual > grounds using switched FPGA I/Os will be possible. I will also see if > we can make any build options to hard ground what are I/O pins via > solder bridge or 0201 resistor etc. > > Generally we could use a few I/O than we have available on the 120 way > connector currently pencilled in but the next size up standard > connector is 180 way and is a bit big physically for the card edge. > Generally we are trying to an internal standard for what might be > developed as future products beyond Tarfessock1. > > If we get a good response to this card it likely we will do a big > brother version in Virtex-5 but that is only one of many projects > competing for team time in Q4 and not guaranteed to happen as yet. > > John Adair > Enterpoint Ltd. > > Bob Perlman wrote: >> Hi - >> >> I don't know if anyone else has mentioned it, but please make sure you >> have lots of grounds, well spread out, on the external module >> connector(s). >> >> Bob Perlman >> Cambrian Design Works >> http://www.cambriandesign.com >> >> >> On Thu, 20 Jul 2006 10:48:42 +0100, "John Adair" >> <removethisthenleavejea@replacewithcompanyname.co.uk> wrote: >> >> >We have mentioned Tarfessock1 before and now at the last point where we >> >can >> >add features for the board. You know have the last chance to ask for >> >things >> >you might want in this Cardbus format card so do ask. Currently the spec >> >on >> >the card is as follows: >> > >> >Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface >> >etc), >> >Device2 programmable from Device1 or SPI prom. >> >Device 2 = XC3S1200 or XC3S1600 >> >4 ch DAC >> >8 ch A/D >> >O/P JTAG - looks like parallel port + cable3 for programming outside >> >target >> >boards. Supported by Device1. >> >1 serial RS232 interface outside world for MicroBlaze support etc. 1 >> >internal serial (TTL) also possible to Device2. >> >4 ch RS485 serial controllable half duplex. >> >SDRAM + second SPI Flash on Device2 >> >Approx 70 5V tolerant I/O to outside world. >> >Switched 3.3V O/P to supported external modules that don't need to be >> >powered all the time (i.e. for running in the wild on laptop battery >> >etc). >> > >> >We are using a 120 pin connector to support all these features and there >> >will be breakout board/s available to better pitches. >> > >> >We are currently still on schedule for a September launch. >> > >> >John Adair >> >Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus >> >Development Board. >> >http://www.enterpoint.co.uk >> > >
Reply by ●July 21, 20062006-07-21
All of our development boards support LVDS with matched pair routing. Even our low cost Raggedstone has about 50+ pairs of signals usually matched in length 1mm or less that run together from the relevant pair on the FPGA to the DIL headers. They don't share with other things generally either. This is part of the reason we use large I/O count devices even on our cheap boards. It is a major differentiation between our product and something like the Spartan-3 and 3E starter kits that use relatively small I/O count devices. We also tend use the large size package because of the SSO advantage and in fact we have an internal production test for some the boards with a very large percentage of I/O, at large toggle rate, running over our boards at 50Mhz and we get very good performance. Conversely we have seen other peoples designs that use PQFP and TQFP packages having very serious issues with small percentage toggle rates at relative low frequencies and the advantage of a BGA package is very large and well worth the little bit of extra money to have in most design cases. Tarfessock1 will have support for LVDS built in a good percentage of the I/O if not all, I expect we will have 20+ pairs maybe even the lot to give 35 pairs. The grounding we will have to see how good it is and whether virtual grounds from FPGA I/Os are needed. However we do want to maintain the planned 70 I/O as it is fairly key to what we want to do outside the card itself. Ultimately whatever we do we won't please everyone and that is what market choice for. I do think we have formula that will win a lot of friends especially when the planned extended functionality becomes clearer in the shape of future add-on modules. I don't think the price is bad either especially if you qualify for student pricing but I'm sure someone will still point out the card costs more than it's constituent parts and designing it is cheap and not be equated in the price. John Adair Enterpoint Ltd. John_H wrote:> Not enough grounds is a serious problem for good, high speed design. If > there's a decent job done with differential routing for LVDS pairs (and LVDS > voltage banks) then the demands on the grounds are lighter, allowing both a > slow-speed, many I/O solution *and* a high-speed solution. The Spartan3E > Starter kit had more than a dozen differential pairs but only about 4 pairs > were "usable" because the others shared signals with LEDs or test headers > that left huge stubs. If you did a good job with differential pairs, the > speed might be pushed through the development connector. > > "John Adair" <g1@enterpoint.co.uk> wrote in message > news:1153470659.303728.303030@75g2000cwc.googlegroups.com... > > Bob > > > > Probably won't be as many as desireable but the option of using virual > > grounds using switched FPGA I/Os will be possible. I will also see if > > we can make any build options to hard ground what are I/O pins via > > solder bridge or 0201 resistor etc. > > > > Generally we could use a few I/O than we have available on the 120 way > > connector currently pencilled in but the next size up standard > > connector is 180 way and is a bit big physically for the card edge. > > Generally we are trying to an internal standard for what might be > > developed as future products beyond Tarfessock1. > > > > If we get a good response to this card it likely we will do a big > > brother version in Virtex-5 but that is only one of many projects > > competing for team time in Q4 and not guaranteed to happen as yet. > > > > John Adair > > Enterpoint Ltd. > > > > Bob Perlman wrote: > >> Hi - > >> > >> I don't know if anyone else has mentioned it, but please make sure you > >> have lots of grounds, well spread out, on the external module > >> connector(s). > >> > >> Bob Perlman > >> Cambrian Design Works > >> http://www.cambriandesign.com > >> > >> > >> On Thu, 20 Jul 2006 10:48:42 +0100, "John Adair" > >> <removethisthenleavejea@replacewithcompanyname.co.uk> wrote: > >> > >> >We have mentioned Tarfessock1 before and now at the last point where we > >> >can > >> >add features for the board. You know have the last chance to ask for > >> >things > >> >you might want in this Cardbus format card so do ask. Currently the spec > >> >on > >> >the card is as follows: > >> > > >> >Dual Spartan-3E (Device 1 notionallly fixed covering Cardbus interface > >> >etc), > >> >Device2 programmable from Device1 or SPI prom. > >> >Device 2 = XC3S1200 or XC3S1600 > >> >4 ch DAC > >> >8 ch A/D > >> >O/P JTAG - looks like parallel port + cable3 for programming outside > >> >target > >> >boards. Supported by Device1. > >> >1 serial RS232 interface outside world for MicroBlaze support etc. 1 > >> >internal serial (TTL) also possible to Device2. > >> >4 ch RS485 serial controllable half duplex. > >> >SDRAM + second SPI Flash on Device2 > >> >Approx 70 5V tolerant I/O to outside world. > >> >Switched 3.3V O/P to supported external modules that don't need to be > >> >powered all the time (i.e. for running in the wild on laptop battery > >> >etc). > >> > > >> >We are using a 120 pin connector to support all these features and there > >> >will be breakout board/s available to better pitches. > >> > > >> >We are currently still on schedule for a September launch. > >> > > >> >John Adair > >> >Enterpoint Ltd. - Soon to be Home of Tarfessock1. The Spartan-3E Cardbus > >> >Development Board. > >> >http://www.enterpoint.co.uk > >> > > >
Reply by ●July 21, 20062006-07-21
"John Adair" <g1@enterpoint.co.uk> wrote:>Web page with block diagram and outline spec is now on website here >http://www.enterpoint.co.uk/moelbryn/tarfessock1.html.How about a programmable clock source? Even better, one which has equal / matched lines to each FPGA so both FPGAs get the same clock. Multiple independant frequencies would be better. This may also be a good selling point for universities, crossing a clock boundary is not trivial in most cases. -- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nl
Reply by ●July 21, 20062006-07-21
I've had passing interest in your offerings before - they look reasonable for the price and functionality offered. Your discussion about acute attention to differential I/O and use of BGA packages is making me think more seriously about shipping stuff across the pond. For Tarfessock1, I'm left wondering what needs to be developed by me versus what you would supply for CardBus access. I'm the FPGA guy, not into Windows drivers to save my life. I'll take another, closer look at your site this weekend, particularly the info you've generated so far for Tarfessock1. - John_H "John Adair" <g1@enterpoint.co.uk> wrote in message news:1153510536.728994.136460@75g2000cwc.googlegroups.com...> All of our development boards support LVDS with matched pair routing. > Even our low cost Raggedstone has about 50+ pairs of signals usually > matched in length 1mm or less that run together from the relevant pair > on the FPGA to the DIL headers. They don't share with other things > generally either. This is part of the reason we use large I/O count > devices even on our cheap boards. It is a major differentiation between > our product and something like the Spartan-3 and 3E starter kits that > use relatively small I/O count devices. We also tend use the large size > package because of the SSO advantage and in fact we have an internal > production test for some the boards with a very large percentage of > I/O, at large toggle rate, running over our boards at 50Mhz and we get > very good performance. Conversely we have seen other peoples designs > that use PQFP and TQFP packages having very serious issues with small > percentage toggle rates at relative low frequencies and the advantage > of a BGA package is very large and well worth the little bit of extra > money to have in most design cases. > > Tarfessock1 will have support for LVDS built in a good percentage of > the I/O if not all, I expect we will have 20+ pairs maybe even the lot > to give 35 pairs. The grounding we will have to see how good it is and > whether virtual grounds from FPGA I/Os are needed. However we do want > to maintain the planned 70 I/O as it is fairly key to what we want to > do outside the card itself. Ultimately whatever we do we won't please > everyone and that is what market choice for. I do think we have formula > that will win a lot of friends especially when the planned extended > functionality becomes clearer in the shape of future add-on modules. I > don't think the price is bad either especially if you qualify for > student pricing but I'm sure someone will still point out the card > costs more than it's constituent parts and designing it is cheap and > not be equated in the price. > > John Adair > Enterpoint Ltd.
