EDK Using External Ports to toggle FPGA pins

Hello All,

I am having a hard time understanding EDK  ---> FPGA tool flow (I
think).  I am using EDK/ISE 8.1, testing the Generic Reference Design
from Memec/Avnet.  It is for the Xilinx FX12 mini-module.

I have been able to use the drivers supplied to control the LCD screen,
rs232 uart and the user LEDs as expected.  But when it comes to a
specific FPGA pin of my choice I'm getting lost.

I first started out with their example, and created my own spin off of
theirs, trying to learn my way around the IDE of EDK.  All is working
well except my understanding of the UCF file corresponding to the data
inside EDK.  Ok, so in my xparameters.h file I see there are
refferencing the memory locations for each component in the system
assembly.  So in C I can assign these "registers" via the drivers and
get expected results.  When it comes down to bit by bit I am lost.

Is the UCF file that I'm using generated by EDK, or did someone from
memec hand sculpt this?
Maybe I have to import this into an ISE project to get the big picture?

When I assign a gpio output 0x0550 I can see one 5 on my FPGA pins, but
not in the order I would expect it.  Really it's not a five at all,
unless I'm reading all the even pins.  And I thought the gpio output
was 32 bit, so why in the UCF file is there only 10 pins assigned to
the gpio output port(s)?

I hope I am not being to vague/mis-guided, and even confusing you guys.
Because I have certianly exhausted my confusion.  I've also read over a
ton of documentation from XIlinx, about EDK, the drivers, etc...  I was
searching for that golden document that would tell me exactly what I
needed to know and I havn't found it yet.  Maybe I am not looking for
the correct topics in the manuals?  Maybe I need to read over PowerPC
user guide a bit more?
Help point me in the wright direction!

Thanks,
Kyle

Kyle,

> Is the UCF file that I'm using generated by EDK, or did someone from
> memec hand sculpt this?

The UCF file has been written manually. The pin assignments have to match
the board's schematics.

> Maybe I have to import this into an ISE project to get the big picture?

Not really. ISE is required if your embedded design is going to be a part of
a bigger design. Then it makes sense to have top level design in ISE.
Otherwise it is easier to stay in EDK. EDK will call required ISE routines
in background.

> And I thought the gpio output
> was 32 bit, so why in the UCF file is there only 10 pins assigned to
> the gpio output port(s)?

That's because they didn't care to declare it as a 10 bit port. Since there
are only 10 pins assigned physically in the UCF file the tools trim the rest
during build time.

Take a look at the MHS file. In the top it has external ports section, which
lists all of the external IOs in your design. All of these need to have LOC
constraints in the UCF file to be routed correctly for your board. Watch for
the names to match. Also, looking at the MHS file you can figure out how
these IOs connected to various blocks in your design, e.g. how the GPIO pins
connected to the GPIO module. Watch the bit order, sometimes it can be
confusing.


Hope this helps,
/Mikhail

Also, make a habit to look at your project_name.par file when the tools have
run their course. See that all your constraints have been met, in particular
that the number of IOs equals the number of LOC'ed IOs, etc..

/Mikhail

Kyle H. wrote:
> Hello All,
>
> I am having a hard time understanding EDK  ---> FPGA tool flow (I
> think).  I am using EDK/ISE 8.1, testing the Generic Reference Design
> from Memec/Avnet.  It is for the Xilinx FX12 mini-module.
>
> I have been able to use the drivers supplied to control the LCD screen,
> rs232 uart and the user LEDs as expected.  But when it comes to a
> specific FPGA pin of my choice I'm getting lost.
>
> I first started out with their example, and created my own spin off of
> theirs, trying to learn my way around the IDE of EDK.  All is working
> well except my understanding of the UCF file corresponding to the data
> inside EDK.  Ok, so in my xparameters.h file I see there are
> refferencing the memory locations for each component in the system
> assembly.  So in C I can assign these "registers" via the drivers and
> get expected results.  When it comes down to bit by bit I am lost.
>
> Is the UCF file that I'm using generated by EDK, or did someone from
> memec hand sculpt this?
> Maybe I have to import this into an ISE project to get the big picture?
>
> When I assign a gpio output 0x0550 I can see one 5 on my FPGA pins, but
> not in the order I would expect it.  Really it's not a five at all,
> unless I'm reading all the even pins.  And I thought the gpio output
> was 32 bit, so why in the UCF file is there only 10 pins assigned to
> the gpio output port(s)?
>
Since the PPC is big-endian, the output order of GPIO should be
inversed as you expected.

> I hope I am not being to vague/mis-guided, and even confusing you guys.
> Because I have certianly exhausted my confusion.  I've also read over a
> ton of documentation from XIlinx, about EDK, the drivers, etc...  I was
> searching for that golden document that would tell me exactly what I
> needed to know and I havn't found it yet.  Maybe I am not looking for
> the correct topics in the manuals?  Maybe I need to read over PowerPC
> user guide a bit more?
> Help point me in the wright direction!
> 
> Thanks,
> Kyle

Ok, So I think I can get past that part for now.

Now, I'm trying to recreate the tutorial.  I notice is Base System
Builder it doesnt list the LCD screen as a periphial.  So I am trying
to add it manually.  I have the pcore and the drivers, I can add it as
a periphial and set it up on the bus sucessfully, but I am having
issues with the drivers.  I copied them to the include folder and the
folder that my test code is in, and I cannot get it to comiple
correctly.  This is possibly my lack of knowledge in the C language?

I'm starting to get the hang of all this.  I'm fairly fresh outta
school (getting a little ripe) but I don't work with anyone that's had
more experience than me in this, so I'm finding this a bit
frustraiting, expecially when I have a project I am to be working on!

I'm also messing around with a bootloaded design, and downloading to
the flash and external ram.  From reading over the tutorial it looks
like XPS/EDK builds a bootloader for you...I suppose a basic
bootloader.  Well I'll see what I can come up with.

Thanks for your support!