Does MAC FIR filter need special care?

Hi everyone,

I am currently trying to implement a polyphase decimation filter by
using core generator in ISE 7.1

The filter has been both implemented by using DA FIR and MAC. The DA
FIR filter is working as it supposes to be, but MAC doesn't. I can't
really see why.

All the inputs and control signals feeding into these filters are the
same. They are running in exactly the same environment. The only
difference between these two filters that I know is that the output of
DA FIR is 28 bits and the output of MAC is 29 bits.

My question is does the MAC filter requires special care compare with
DA FIR.

Please help me. Any information will be appreciated. 

Sophi

Decimation used not to work in MAC FIR until certain version. I believe it
should have been fixed in v5.1. It might be that you are using an old core.

/Mikhail

MM wrote:
> Decimation used not to work in MAC FIR until certain version. I believe it
> should have been fixed in v5.1. It might be that you are using an old core.
>
> /Mikhail

Hi Mikhail,

I am in fact using version 5.1 logicCore. So, I don't think that's the
problem. But thank you for your help anyway.

Sophi :)

When you say it doesn't work, what exactly do you mean? Have you tried
simulating it?

/Mikhail

Hi Mikhail,

OK. I have generated the programming file and downloaded to the FPGA. I
feed a pure sine wave into an ADC on board, which connect to the input
of the filters ( FIR and MAC). The output of the filters are connected
to two DAC on board seperately so we can compare the output waveform at
the same time.

Therefore the output of the filters should be a sine wave too if the it
is within the passband frequency range. But the signal coming out from
MAC is not a continuouse function. It has some sort of sine function
feature, but at certain point in time, it looks like the sign of the
signal is changed.

The output of the FIR filter is completely fine. That's where it
puzzles me. The two filters are running in the exactly the same
environment.

It is not a clipping problem. I have tried to reduced the input signal
amplitude and that didn't solve the problem. I haven't really try to
simulate it yet. The whole project has too many inputs. It is not
really an easy job to simulate the entire module.

Sophi


MM wrote:
> When you say it doesn't work, what exactly do you mean? Have you tried
> simulating it?
> 
> /Mikhail

Hi Sophi,

> OK. I have generated the programming file and downloaded to the FPGA.

What is your input sampling rate? Have you put proper timing constraints?
Have they been met?

> I feed a pure sine wave into an ADC on board, which connect to the input
> of the filters ( FIR and MAC). The output of the filters are connected
> to two DAC on board seperately so we can compare the output waveform at
> the same time.

Have you tried swapping the channels, i.e. connecting the MAC filter to the
DAC that was proved working with another filter?

> Therefore the output of the filters should be a sine wave too if the it
> is within the passband frequency range. But the signal coming out from
> MAC is not a continuouse function. It has some sort of sine function
> feature, but at certain point in time, it looks like the sign of the
> signal is changed.

This is where simulation would be useful...

> I haven't really try to
> simulate it yet. The whole project has too many inputs. It is not
> really an easy job to simulate the entire module.

You don't need to simulate the whole thing. Just take the filter, make a
simple test bench that would apply necessary clock(s) and a test tone. Good
simulators such as Active HDL can show buses as waveform, so you will
immediately see if the thing works. In fact, I believe all you really need
to see is the output ready signal being generated at the proper decimated
rate...

/Mikhail

Hi /Mikhail,

I think I will try to simulate the MAC filter on its own asap. I have
tried every other possibility that might introduce problems that I can
think of, including those ones in your previouse reply.

Once again, thank you for your help and I will give you some feed back
after the simulation is done. 

Sophi