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virtex II inner organisation

Started by flo August 12, 2006
Hi everyone,
I'm trying to deal with readback and scrubbing into a XC2V1500 FPGA.

I've got a problem identifying the Major Adress and the Minor Adress 
when I'm doing a readback.
I read documents (XAPP138 and XAPP151) but nothing works with virtexII.
I know the frame length and the number of frame because it is in the 
bitstream but nothing about the number of frame in each minor adress 
depending on the major address and the blockk type...

Does anyone know how to determine it?

Thanks a lot.

florent
flo schrieb:

> Hi everyone, > I'm trying to deal with readback and scrubbing into a XC2V1500 FPGA. > > I've got a problem identifying the Major Adress and the Minor Adress > when I'm doing a readback. > I read documents (XAPP138 and XAPP151) but nothing works with virtexII. > I know the frame length and the number of frame because it is in the > bitstream but nothing about the number of frame in each minor adress > depending on the major address and the blockk type... > > Does anyone know how to determine it? > > Thanks a lot. > > florent
this information is available in some files in the \xilinx\ dirs but you cant access them. the easiest is to run bitgen with debug option and then look at the file, it will write out each frame separatly so you can gather the information you need antti
Hello Flo,

> Hi everyone, > I'm trying to deal with readback and scrubbing into a XC2V1500 FPGA. > > I've got a problem identifying the Major Adress and the Minor Adress > when I'm doing a readback. > > Does anyone know how to determine it?
This information is available in the virtex-II Useg Guide (ug002.pdf) available on Xilinx's website. Page 314 and following for the current revision (configuration details). Table 4-17 coupled with FAR decoding is what you're looking for. Based on this info I've already written working code for reading and dumping xc2v2000 *bitstreams* (crc computation, luts, brams...). I can release it under the GPL if you can help me to get it to work with readbacks (how far is that from pure bitstreams ?) and the 1500 (small amount of work here). JB
Antti a �crit :
> flo schrieb: > >> Hi everyone, >> I'm trying to deal with readback and scrubbing into a XC2V1500 FPGA. >> >> I've got a problem identifying the Major Adress and the Minor Adress >> when I'm doing a readback. >> I read documents (XAPP138 and XAPP151) but nothing works with virtexII. >> I know the frame length and the number of frame because it is in the >> bitstream but nothing about the number of frame in each minor adress >> depending on the major address and the blockk type... >> >> Does anyone know how to determine it? >> >> Thanks a lot. >> >> florent > > this information is available in some files in the \xilinx\ dirs but > you cant > access them. > > the easiest is to run bitgen with debug option and then look at the > file, > it will write out each frame separatly so you can gather the > information you need > > antti >
thanks antti ! I tried your solution and I can get beginning and end of each MJA/MNA into the bitstream. It is a very interesting option for debug. florent
jbnote@gmail.com a �crit :
> Hello Flo, > >> Hi everyone, >> I'm trying to deal with readback and scrubbing into a XC2V1500 FPGA. >> >> I've got a problem identifying the Major Adress and the Minor Adress >> when I'm doing a readback. >> >> Does anyone know how to determine it? > > This information is available in the virtex-II Useg Guide (ug002.pdf) > available on Xilinx's website. Page 314 and following for the current > revision (configuration details). Table 4-17 coupled with FAR decoding > is what you're looking for.
Excellent ! brilliant! that's it, at least, the info i needed.
> > Based on this info I've already written working code for reading and > dumping xc2v2000 *bitstreams* (crc computation, luts, brams...). > > I can release it under the GPL
It would be interesting for my personnal knowledge, but the vhdl code I work on is for an electronic company. I'm not sure GPL will be much use for them. if you can help me to get it to work
> with readbacks (how far is that from pure bitstreams ?)
Sure I can have a look. In fact readback and error detection into the read data are the only things I'm sure is working. and the 1500
> (small amount of work here).
Sure I can complete your design with 1500 info let me know. Cheers. Florent
> > JB >