Higher voltages input, quick check....

I need to interface some 12 and 24V signals to an FPGA/CPLD,
it'll probably be one of the low end Spartans or Cyclones.

These are _very_ low bandwidth signals, 10's of hz at the most.

Because of the signal density, cost and restrictions of board
space I am unable to implement any voltage regulation/clamping
pre the FPGA inputs.

I am planning to using a very large in line resistor (100K ?) to
limit current into the device pins.

I know that one of the recommended techniques for interfacing to
5V PCI signals is to use an in-line current limiting resistor.
What I'm planning is an extension of this but I've previously
always used quickswitches to clamp higher volates to safe limits
and intuitively don't like applying these higher voltages to the
pins.

Should this be OK?




Nial

Nial Stewart schrieb:
> I need to interface some 12 and 24V signals to an FPGA/CPLD,
> it'll probably be one of the low end Spartans or Cyclones.
>
> These are _very_ low bandwidth signals, 10's of hz at the most.
>
> Because of the signal density, cost and restrictions of board
> space I am unable to implement any voltage regulation/clamping
> pre the FPGA inputs.
>
> I am planning to using a very large in line resistor (100K ?) to
> limit current into the device pins.
>
> I know that one of the recommended techniques for interfacing to
> 5V PCI signals is to use an in-line current limiting resistor.
> What I'm planning is an extension of this but I've previously
> always used quickswitches to clamp higher volates to safe limits
> and intuitively don't like applying these higher voltages to the
> pins.
>
> Should this be OK?
>
> Nial

probably. but the thing with the 'clamp diodes' is that they are not
necessarily always enabled! and then the actual voltages on the io pad
would rise well above 5V. So it makes sense to checkout if the clamp
diodes are there when FPGA is not configured.

I have had some FPGA to get internal VCCINT short circuit an a board
that had a few hundred ohms series resistor from an 5V RS232C
driver IC to FPGA pin. I cant know that this was the reason for the
FPGAs to burn, but I would be rather careful with the non-3.3V inputs
(24V!)
and series resistors.

Antti

Nial Stewart wrote:
> I need to interface some 12 and 24V signals to an FPGA/CPLD,
> it'll probably be one of the low end Spartans or Cyclones.

> Because of the signal density, cost and restrictions of board
> space I am unable to implement any voltage regulation/clamping
> pre the FPGA inputs.
> 
> I am planning to using a very large in line resistor (100K ?) to
> limit current into the device pins.

Is there no space for a zener diode from the signal line to ground
additionally to a series resistor?

Ralf

"Ralf Hildebrandt" <Ralf-Hildebrandt@gmx.de> wrote in message news:4lr2t3F3a937U1@individual.net...

> Is there no space for a zener diode from the signal line to ground
> additionally to a series resistor?


Possibly, I can possibly negotiate a bit more space with my
client if I can convince him it's going to make things more
reliable.

We were trying to fit things into an enclosure bought off
the shelf, but he's been enthusing about a custom enclosure
manufacturer he went to see yesterday. If their quotes are
reasonable I should be able to get a bit more space.


Nial.

"Antti" <Antti.Lukats@xilant.com> wrote in message 
news:1157124085.509196.151500@h48g2000cwc.googlegroups.com...
> Nial Stewart schrieb:

> probably. but the thing with the 'clamp diodes' is that they are not
> necessarily always enabled! and then the actual voltages on the io pad
> would rise well above 5V. So it makes sense to checkout if the clamp
> diodes are there when FPGA is not configured.
>
> I have had some FPGA to get internal VCCINT short circuit an a board
> that had a few hundred ohms series resistor from an 5V RS232C
> driver IC to FPGA pin. I cant know that this was the reason for the
> FPGAs to burn, but I would be rather careful with the non-3.3V inputs
> (24V!)
> and series resistors.


I'll check the clamp diode situation, I thought they were always
enables (should RTFM I supposed).

Thanks for the heads up Antti.


Nial. 

Nial Stewart schrieb:

> "Antti" <Antti.Lukats@xilant.com> wrote in message
> news:1157124085.509196.151500@h48g2000cwc.googlegroups.com...
> > Nial Stewart schrieb:
>
> > probably. but the thing with the 'clamp diodes' is that they are not
> > necessarily always enabled! and then the actual voltages on the io pad
> > would rise well above 5V. So it makes sense to checkout if the clamp
> > diodes are there when FPGA is not configured.
> >
> > I have had some FPGA to get internal VCCINT short circuit an a board
> > that had a few hundred ohms series resistor from an 5V RS232C
> > driver IC to FPGA pin. I cant know that this was the reason for the
> > FPGAs to burn, but I would be rather careful with the non-3.3V inputs
> > (24V!)
> > and series resistors.
>
>
> I'll check the clamp diode situation, I thought they were always
> enables (should RTFM I supposed).
>
> Thanks for the heads up Antti.
>
> Nial.
Hi Nial,

well in case the clamp diode can be specified with FPGA config
settings, like PCI Clamp ON-OFF, then it obviously can not be
permanently on. just make some experiments with large resistor,
multimeter and adjustable power supply, while keeping the FPGA
unconfigured.

if you can have some external zener or tvs its better of course
solution

Antti

On Fri, 1 Sep 2006 16:13:19 +0100, "Nial Stewart"
<nial@nialstewartdevelopments.co.uk> wrote:

>I need to interface some 12 and 24V signals to an FPGA/CPLD,
>it'll probably be one of the low end Spartans or Cyclones.
>These are _very_ low bandwidth signals, 10's of hz at the most.

Oh, tell me about it.  In a previous existence, that sort of thing
was the bane of my life.  Mind-numbingly simple stuff, but
there's no well-integrated support for it; it costs space, 
components, PCB trackery, power supply fuss and bother,
and all manner of general horribleness.

I would be very nervous of adding 100K-ish resistors in
series with an FPGA input; the very slow rise times you
would thus get sound to me like a recipe for nasty stuff
to happen on the inputs.  (Note to self: must check
data sheet; how much hysteresis do they have on
FPGA inputs these days?)  Of course you will be
applying all sorts of filtering, debouncing and other
good stuff to the signals once inside the FPGA, but...

You can get clamp diode arrays in reasonably small
packages; would that help?

>Because of the signal density, cost and restrictions of board
>space I am unable to implement any voltage regulation/clamping
>pre the FPGA inputs.

That statement bothers me a little.  If these are the usual 24V
industrial sensor type inputs, then each input has a cost and
space penalty associated with it (connectors, wiring, EMC
filtering gubbins like clamp-on ferrites...) that
vastly outweighs the cost and area of a couple of small SM
components.  I know that sometimes we poor electronics 
grunts are squeezed into absurdly tight spaces because
"the electronics doesn't take up much room, does it?".
But there's also the small matter that these
24V signals probably come from badly-shielded wiring
that's spent most of its life in close proximity to a 5kW
electric motor, or an arc welding set, or some other
macho equipment.  I used to reckon that effort spent
on dealing with those risks in a paranoid way *always*
paid for itself in reduced hassle later.

If your electrical environment is much kinder than
I was used to, then please forgive my irrelevant
ramblings.
-- 
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which 
are not the views of Doulos Ltd., unless specifically stated.

> Oh, tell me about it.  In a previous existence, that sort of thing
> was the bane of my life.  Mind-numbingly simple stuff, but
> there's no well-integrated support for it; it costs space,
> components, PCB trackery, power supply fuss and bother,
> and all manner of general horribleness.

You've been here then :-(

Made worse by the fact I work for/by myself so there's no one
to talk this sort of stuff over with (that's where 'you lot'
come in).


> I would be very nervous of adding 100K-ish resistors in
> series with an FPGA input; the very slow rise times you
> would thus get sound to me like a recipe for nasty stuff
> to happen on the inputs.  (Note to self: must check
> data sheet; how much hysteresis do they have on
> FPGA inputs these days?)  Of course you will be
> applying all sorts of filtering, debouncing and other
> good stuff to the signals once inside the FPGA, but...

They are deliberately slugged and will have a couple of
ms debouncing inside the FPGA as you've guessed. These
could be reduced after initial system tests.

> You can get clamp diode arrays in reasonably small
> packages; would that help?

I think I've convinced myself that omitting some sort of
voltage clamp will be a false economy, I'll look into
the smallest/cheapest way of implementing it.


>>Because of the signal density, cost and restrictions of board
>>space I am unable to implement any voltage regulation/clamping
>>pre the FPGA inputs.
>
> That statement bothers me a little.  If these are the usual 24V
> industrial sensor type inputs, then each input has a cost and
> space penalty associated with it (connectors, wiring, EMC
> filtering gubbins like clamp-on ferrites...) that
> vastly outweighs the cost and area of a couple of small SM
> components.  I know that sometimes we poor electronics
> grunts are squeezed into absurdly tight spaces because
> "the electronics doesn't take up much room, does it?".
> But there's also the small matter that these
> 24V signals probably come from badly-shielded wiring
> that's spent most of its life in close proximity to a 5kW
> electric motor, or an arc welding set, or some other
> macho equipment.  I used to reckon that effort spent
> on dealing with those risks in a paranoid way *always*
> paid for itself in reduced hassle later.
> If your electrical environment is much kinder than
> I was used to, then please forgive my irrelevant
> ramblings.


It should be a bit less noisy (hopefully), but you're right
the filter/clamping is going in, reliability in service is
important.

Thanks for the feedback guys, it's been useful.


Nial

Jonathan Bromley schrieb:

> On Fri, 1 Sep 2006 16:13:19 +0100, "Nial Stewart"
> <nial@nialstewartdevelopments.co.uk> wrote:
>
> >I need to interface some 12 and 24V signals to an FPGA/CPLD,
> >it'll probably be one of the low end Spartans or Cyclones.
> >These are _very_ low bandwidth signals, 10's of hz at the most.
>
> Oh, tell me about it.  In a previous existence, that sort of thing
> was the bane of my life.  Mind-numbingly simple stuff, but
> there's no well-integrated support for it; it costs space,
> components, PCB trackery, power supply fuss and bother,
> and all manner of general horribleness.
>
> I would be very nervous of adding 100K-ish resistors in
> series with an FPGA input; the very slow rise times you
> would thus get sound to me like a recipe for nasty stuff
> to happen on the inputs.  (Note to self: must check
> data sheet; how much hysteresis do they have on
> FPGA inputs these days?)  Of course you will be
> applying all sorts of filtering, debouncing and other
> good stuff to the signals once inside the FPGA, but...
>
> You can get clamp diode arrays in reasonably small
> packages; would that help?
>
> >Because of the signal density, cost and restrictions of board
> >space I am unable to implement any voltage regulation/clamping
> >pre the FPGA inputs.
>
> That statement bothers me a little.  If these are the usual 24V
> industrial sensor type inputs, then each input has a cost and
> space penalty associated with it (connectors, wiring, EMC
> filtering gubbins like clamp-on ferrites...) that
> vastly outweighs the cost and area of a couple of small SM
> components.  I know that sometimes we poor electronics
> grunts are squeezed into absurdly tight spaces because
> "the electronics doesn't take up much room, does it?".
> But there's also the small matter that these
> 24V signals probably come from badly-shielded wiring
> that's spent most of its life in close proximity to a 5kW
> electric motor, or an arc welding set, or some other
> macho equipment.  I used to reckon that effort spent
> on dealing with those risks in a paranoid way *always*
> paid for itself in reduced hassle later.
>
> If your electrical environment is much kinder than
> I was used to, then please forgive my irrelevant
> ramblings.
> --
> Jonathan Bromley, Consultant
>
> DOULOS - Developing Design Know-how
> VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
>
> Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
> jonathan.bromley@MYCOMPANY.com
> http://www.MYCOMPANY.com
>
> The contents of this message may contain personal views which
> are not the views of Doulos Ltd., unless specifically stated.

good points! if the inputs come from anywhere outside the closure
then special care should be taken. this may be much more than
the worry about the 3.3V inputs.

I had even more bad problem -
a wire about 1.5Meter long carrying 12V signal switched with a relay
was  "just in the same cable bundle" as a wire going to the reset input
of Atmel AVR.

and the result? the AVR microcontroller entered into a mode that
allowed it to completly self erase itself - this is something Atmel
claims not to be possible at all. Still it happened! Twice! The second
time I asked someone else to verify my actions as I was testing the
damaged silicon. The thing was inline flash programmer for Ericson
mobile phone accessories (planned 500,000 yearly throughput). As
project manager back then - brr, that explains why project managers are
those who get gray hair!

so if you have the FPGA connected to some external cable-bundle
carrying 24V switching signals, then well all your client setup may
call for trouble. So be as paranoid as you can, as already suggested.

Antti

"Nial Stewart" <nial@nialstewartdevelopments.co.uk> wrote in message
news:4lr10iF394osU1@individual.net...
> I need to interface some 12 and 24V signals to an FPGA/CPLD,
> it'll probably be one of the low end Spartans or Cyclones.
>
> These are _very_ low bandwidth signals, 10's of hz at the most.
>
> Because of the signal density, cost and restrictions of board
> space I am unable to implement any voltage regulation/clamping
> pre the FPGA inputs.
>
> I am planning to using a very large in line resistor (100K ?) to
> limit current into the device pins.
>
> I know that one of the recommended techniques for interfacing to
> 5V PCI signals is to use an in-line current limiting resistor.
> What I'm planning is an extension of this but I've previously
> always used quickswitches to clamp higher volates to safe limits
> and intuitively don't like applying these higher voltages to the
> pins.
>
> Should this be OK?
>
>
Hi Nial,
If the signal goes from 0V to 24V and if you've got room for a resistor,
you've probably got room for a diode. Point the sharp end at the 24V signal,
the blunt end towards the FPGA. Turn on the FPGA pin's internal pullup
resistor. Viola!
HTH, Syms.