advantages of ethernet MAC ip core

Hi all!

Can someone tell me the advantages and disadvantages of an ethernet
MAC core implemented in a FPGA for a System On Chip?

Why to buy a lincese for several thousand dollar for an ethernet MAC
core and there is also an external PHY chip on the board?
There are also external chips which combine the MAC and the PHY layer.

Thanks

Martin

Martin wrote:
> Hi all!
> 
> Can someone tell me the advantages and disadvantages of an ethernet
> MAC core implemented in a FPGA for a System On Chip?
> 
> Why to buy a lincese for several thousand dollar for an ethernet MAC
> core and there is also an external PHY chip on the board?
 >
> There are also external chips which combine the MAC and the PHY layer.

It's all about trade-offs, isn't it?  Do you want to one large lump sum, 
or a little at a time over a long period?  Do you have board space? 
Spare I/O?  Voltage rails available?  Do you need the PHY layer, or are 
you paying for something you won't put to good use?

Have fun,

    Marc

Martin wrote:

> Why to buy a lincese for several thousand dollar for an ethernet MAC
> core and there is also an external PHY chip on the board?

If you want to do ethernet you
need both a MAC and PHY.

The MAC is a CPU to PHY interface.
Some CPUs have it built in and a few
PHYs have it built in. Unlike the PHY,
a MAC is purely digital and can be
designed into an FPGA.

If you are making thousands of
boards, or have space constraints,
a MAC core  might make sense.
If you are just making a few hundred,
stick to commercial parts.

           -- Mike Treseler

Actually, if you accept a few restrictions, you can do it all in the FPGA
with very little outside electronics.
I've got good success with 10BASE-T
http://www.fpga4fun.com/10BASE-T.html

Jean


"Mike Treseler" <mike_treseler@comcast.net> wrote in message
news:45SdnSfgV7V3_kaiRVn-tw@comcast.com...
> Martin wrote:
>
> > Why to buy a lincese for several thousand dollar for an ethernet MAC
> > core and there is also an external PHY chip on the board?
>
> If you want to do ethernet you
> need both a MAC and PHY.
>
> The MAC is a CPU to PHY interface.
> Some CPUs have it built in and a few
> PHYs have it built in. Unlike the PHY,
> a MAC is purely digital and can be
> designed into an FPGA.
>
> If you are making thousands of
> boards, or have space constraints,
> a MAC core  might make sense.
> If you are just making a few hundred,
> stick to commercial parts.
>
>            -- Mike Treseler
>

(snip question about ethernet in FPGA)

Jean Nicolle wrote:

> Actually, if you accept a few restrictions, you can do it all in the FPGA
> with very little outside electronics.
> I've got good success with 10BASE-T
> http://www.fpga4fun.com/10BASE-T.html

Do you need a PLL to do it?  I thought it would, but maybe not.

For 100baseTX you need three voltage levels.  Maybe two outputs and
appropriate resistors would work.   Detecting three voltages on input
will be hard, though.

You still need the transformer, which usually doesn't come in
an FPGA.

-- glen

No, I didn't use any PLL so far.
For receiving, I oversampled the signal (possible since 10BASE-T is so slow)
and for transmitting I used a 20MHz clock.
100BASE-T would surely have been more difficult, first the signal looks like
125MHz, and now you mention this 3 voltage signals...

I didn't use any transformer, used capacitive coupling for the receiver, and
direct coupling for the transmitter... works in the lab!
A transformer might be necessary in real life for security or reliability
reasons?
Jean

"glen herrmannsfeldt" <gah@ugcs.caltech.edu> wrote in message
news:RyTCb.387078$ao4.1285856@attbi_s51...
> (snip question about ethernet in FPGA)
>
> Jean Nicolle wrote:
>
> > Actually, if you accept a few restrictions, you can do it all in the
FPGA
> > with very little outside electronics.
> > I've got good success with 10BASE-T
> > http://www.fpga4fun.com/10BASE-T.html
>
> Do you need a PLL to do it?  I thought it would, but maybe not.
>
> For 100baseTX you need three voltage levels.  Maybe two outputs and
> appropriate resistors would work.   Detecting three voltages on input
> will be hard, though.
>
> You still need the transformer, which usually doesn't come in
> an FPGA.
>
> -- glen
>

On a sunny day (Sun, 14 Dec 2003 07:48:34 GMT) it happened "Jean Nicolle"
<j.nicolle@sbcglobal.net> wrote in
<mBUCb.71275$Q%5.12131@newssvr25.news.prodigy.com>:

>No, I didn't use any PLL so far.
>For receiving, I oversampled the signal (possible since 10BASE-T is so slow)
>and for transmitting I used a 20MHz clock.
>100BASE-T would surely have been more difficult, first the signal looks like
>125MHz, and now you mention this 3 voltage signals...
>
>I didn't use any transformer, used capacitive coupling for the receiver, and
>direct coupling for the transmitter... works in the lab!
>A transformer might be necessary in real life for security or reliability
>reasons?
>Jean
I have also build that little differential amp from fpga-fun site.
Not all working yet (no time).
I have not looked up the 100BASE-T spec yet, but 3 voltage levels can
be done using 2 banks with 2 different references?
For a 100MHz transformer, remember those 300Ohm to 75 coax VHF
transformers?
Every old TV had one, just a ferrite core with 3 or 4 turns...
But my ethernet card was only 5.80 Euro, (6 $), there is a small
transformer on it.
So for 6 $ you have a transformer.
Dunno how they can make these cards for that price.
J

You can remove the cost variable from the equation.
Check www.opencores.org.  They offer open source code
for numerous cores, including a MAC PHY with associated
test bench, and documentation.  According to the "Status Log"
for this core, it has been already tested in HW, and has
been used in several commercial implementations.

The reasons for implementing functions in FPGA vs discrete
IC implementation, are all very generic :

[1] Probable reduction in IC count, probable associated cost reduction,
and probable increase in reliability.

[2] Eliminate future redesigns of PWB when an external part
experiences end-of-life.

[3] Ability to "contain" majority of digital logic within single
device simplifies clock domain management for synchronous
design - ie. moves from a PWB/chip-to-chip problem to
a single chip problem .. where it is much easier to manage.

-- 
Regards,
John Retta
Owner and Designer
Retta Technical Consulting Inc.

email : jretta@rtc-inc.com
web :  www.rtc-inc.com


"Martin" <ma_d@freenet.de> wrote in message
news:8c88ba05.0312121258.7e68dc7c@posting.google.com...
> Hi all!
>
> Can someone tell me the advantages and disadvantages of an ethernet
> MAC core implemented in a FPGA for a System On Chip?
>
> Why to buy a lincese for several thousand dollar for an ethernet MAC
> core and there is also an external PHY chip on the board?
> There are also external chips which combine the MAC and the PHY layer.
>
> Thanks
>
> Martin

John Retta wrote:
> You can remove the cost variable from the equation.
> Check www.opencores.org.  They offer open source code
> for numerous cores, including a MAC PHY 

I found the MAC, but the only PHY listed is for USB.


   -- Mike Treseler

That is correct.  No Phy.  My mistake in original email.

-- 
Regards,
John Retta

email : jretta@rtc-inc.com
web :  www.rtc-inc.com


"Mike Treseler" <mike.treseler@flukenetworks.com> wrote in message
news:3FDF7EEB.7060509@flukenetworks.com...
> John Retta wrote:
> > You can remove the cost variable from the equation.
> > Check www.opencores.org.  They offer open source code
> > for numerous cores, including a MAC PHY
>
> I found the MAC, but the only PHY listed is for USB.
>
>
>    -- Mike Treseler
>