Spartan-3: 5V -> 2.5V level shifting

Hi,

I would like to configure a spartan-3 FPGA with an 5V CMOS
microcontroller. I have read xilinx database answer regarding how to
make 3.3V I/O input pins 5V tolerant with a serial resistor (300Ohm).

1) Can also the confg. dedicated pins made 5V tolerant through a serial
resistor although they are powered from 2.5V? (I calculated this an I
came to Rser=3D220OHM)
2) The VIH of my microcontroller is 3V, that of spartan-3 I/O's is
(VCCO=3D3.3V) is 2.9V. Do I need level-shifters to drive my =B5C? If yes,
what IC's would you recommend?

Thank you in advance,
JJ

jidan1@hotmail.com wrote:
> Hi,
>
> I would like to configure a spartan-3 FPGA with an 5V CMOS
> microcontroller. I have read xilinx database answer regarding how to
> make 3.3V I/O input pins 5V tolerant with a serial resistor (300Ohm).
>
> 1) Can also the confg. dedicated pins made 5V tolerant through a serial
> resistor although they are powered from 2.5V? (I calculated this an I
> came to Rser=3D220OHM)
> 2) The VIH of my microcontroller is 3V, that of spartan-3 I/O's is
> (VCCO=3D3.3V) is 2.9V. Do I need level-shifters to drive my =B5C? If yes,
> what IC's would you recommend?
>
>Regarding 1:
I would use 1 kilohm. No need to push more current than necessary.
Regarding 2:
You quote worst-case numbers that assum lowest Vcc on the FPGA and
higest possible Vcc on the uP.
Keep the FPGA fed with at least 3.2 V, and you will see that same
voltage on the output (this is CMOS !), and keep the uP Vcc slightly
below 5V.
But you will not have much noise immunity.
Peter Alfke

jidan,

Peter makes a good point:  if the resistance is too low, then you are
injecting current into the 2.5 V supply, and it may begin to drift up,
and out of regulation.

One way to avoid that, and to avoid any rail supply being driven above
its intended output, is to balance the injected current with a simple
resistor across the power supply, present all the time.

So, if you think you will inject 100 mA worst case into the 2.5V rail,
then plan on having a load of at least 100 mA on the 2.5 volt supply.
If the 2.5 volt supply has a minimum normal load of 50 mA, then you will
need an additional 50 mA load, just in case.  2.5V/.05=50 ohms (51 ohms,
nearest 5% value).

All this because regulators are good at regulating a load, but incapable
of regulating when you source current into there output terminal.

Austin

Peter Alfke wrote:
> jidan1@hotmail.com wrote:
>> Hi,
>>
>> I would like to configure a spartan-3 FPGA with an 5V CMOS
>> microcontroller. I have read xilinx database answer regarding how to
>> make 3.3V I/O input pins 5V tolerant with a serial resistor (300Ohm).
>>
>> 1) Can also the confg. dedicated pins made 5V tolerant through a serial
>> resistor although they are powered from 2.5V? (I calculated this an I
>> came to Rser=220OHM)
>> 2) The VIH of my microcontroller is 3V, that of spartan-3 I/O's is
>> (VCCO=3.3V) is 2.9V. Do I need level-shifters to drive my �C? If yes,
>> what IC's would you recommend?
>>
>> Regarding 1:
> I would use 1 kilohm. No need to push more current than necessary.
> Regarding 2:
> You quote worst-case numbers that assum lowest Vcc on the FPGA and
> higest possible Vcc on the uP.
> Keep the FPGA fed with at least 3.2 V, and you will see that same
> voltage on the output (this is CMOS !), and keep the uP Vcc slightly
> below 5V.
> But you will not have much noise immunity.
> Peter Alfke
> 

Thank you Austin  and Peter for you replies.

I still have 2 questions

1)a) So, you suggest using a 1k ohm serial resistor to interface the 5V
signal to 2.5V input. May I know how you came to this number?
b) For the 5V -> 3.3V interface, xilinx application suggests a
Rser=3D300Ohm. Should I also replace this with a Rser=3D1kohm?

2)Why use a parralell resistor to the voltage regulator and waste power
to handle the reverse current. Why not just add a reverse biased
schotkey diode from the output to the input of the voltage regulator?

Austin Lesea schrieb:

> jidan,
>
> Peter makes a good point:  if the resistance is too low, then you are
> injecting current into the 2.5 V supply, and it may begin to drift up,
> and out of regulation.
>
> One way to avoid that, and to avoid any rail supply being driven above
> its intended output, is to balance the injected current with a simple
> resistor across the power supply, present all the time.
>
> So, if you think you will inject 100 mA worst case into the 2.5V rail,
> then plan on having a load of at least 100 mA on the 2.5 volt supply.
> If the 2.5 volt supply has a minimum normal load of 50 mA, then you will
> need an additional 50 mA load, just in case.  2.5V/.05=3D50 ohms (51 ohms,
> nearest 5% value).
>
> All this because regulators are good at regulating a load, but incapable
> of regulating when you source current into there output terminal.
>
> Austin
>
> Peter Alfke wrote:
> > jidan1@hotmail.com wrote:
> >> Hi,
> >>
> >> I would like to configure a spartan-3 FPGA with an 5V CMOS
> >> microcontroller. I have read xilinx database answer regarding how to
> >> make 3.3V I/O input pins 5V tolerant with a serial resistor (300Ohm).
> >>
> >> 1) Can also the confg. dedicated pins made 5V tolerant through a serial
> >> resistor although they are powered from 2.5V? (I calculated this an I
> >> came to Rser=3D220OHM)
> >> 2) The VIH of my microcontroller is 3V, that of spartan-3 I/O's is
> >> (VCCO=3D3.3V) is 2.9V. Do I need level-shifters to drive my =B5C? If y=
es,
> >> what IC's would you recommend?
> >>
> >> Regarding 1:
> > I would use 1 kilohm. No need to push more current than necessary.
> > Regarding 2:
> > You quote worst-case numbers that assum lowest Vcc on the FPGA and
> > higest possible Vcc on the uP.
> > Keep the FPGA fed with at least 3.2 V, and you will see that same
> > voltage on the output (this is CMOS !), and keep the uP Vcc slightly
> > below 5V.
> > But you will not have much noise immunity.
> > Peter Alfke
> >

Answers below,

Austin

jidan1@hotmail.com wrote:
> Thank you Austin  and Peter for you replies.
> 
> I still have 2 questions
> 
> 1)a) So, you suggest using a 1k ohm serial resistor to interface the 5V
> signal to 2.5V input. May I know how you came to this number?
> b) For the 5V -> 3.3V interface, xilinx application suggests a
> Rser=300Ohm. Should I also replace this with a Rser=1kohm?

The value is up to you:  the choice is for speed, signal integrity, etc.
 Fast would be the smallest value, slower is a larger value.  Peter's
point is that if this is a slow interface (usually is), you don't need
low resistance.

> 
> 2)Why use a parralell resistor to the voltage regulator and waste power
> to handle the reverse current. Why not just add a reverse biased
> schotkey diode from the output to the input of the voltage regulator?

We are not interested in protecting the regulator.  What if the current
forces the 2.5V Vcco and Vccaux to 5 volts?  The the chip blows up...

The resistor value is a compromise between speed and current forced
into the pin.
The driver output impedance is probably below 10 Ohm. With a total load
capacitance of 30 pF that creates an output time constant of 300 ps,
pretty fast.
With a 1 kilohm resistor directly attached to the FPGA pin, that pin
has a capacitance of 10 pF. Times 1 kilohm that is a time constant of
10 ns, which is too slow in some cases, but probably fast enough in
your case. And it limits the per-pin current forced into the FPGA to
about 2 mA.

The regulator usually cannot absorb current flowing backwards, so you
must make sure that the current maintains its direction when the
largest number of interfaces is High.
When the current reverses direction, the voltage would rise, and might
destroy the FPGA (unlikely, but possible).
These are some of the nitty-gritty considerations that pay your (and
my) salary...
Peter Alfke
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
jidan1@hotmail.com wrote:
> Thank you Austin  and Peter for you replies.
>
> I still have 2 questions
>
> 1)a) So, you suggest using a 1k ohm serial resistor to interface the 5V
> signal to 2.5V input. May I know how you came to this number?
> b) For the 5V -> 3.3V interface, xilinx application suggests a
> Rser=3D300Ohm. Should I also replace this with a Rser=3D1kohm?
>
> 2)Why use a parralell resistor to the voltage regulator and waste power
> to handle the reverse current. Why not just add a reverse biased
> schotkey diode from the output to the input of the voltage regulator?
>
> Austin Lesea schrieb:
>
> > jidan,
> >
> > Peter makes a good point:  if the resistance is too low, then you are
> > injecting current into the 2.5 V supply, and it may begin to drift up,
> > and out of regulation.
> >
> > One way to avoid that, and to avoid any rail supply being driven above
> > its intended output, is to balance the injected current with a simple
> > resistor across the power supply, present all the time.
> >
> > So, if you think you will inject 100 mA worst case into the 2.5V rail,
> > then plan on having a load of at least 100 mA on the 2.5 volt supply.
> > If the 2.5 volt supply has a minimum normal load of 50 mA, then you will
> > need an additional 50 mA load, just in case.  2.5V/.05=3D50 ohms (51 oh=
ms,
> > nearest 5% value).
> >
> > All this because regulators are good at regulating a load, but incapable
> > of regulating when you source current into there output terminal.
> >
> > Austin
> >
> > Peter Alfke wrote:
> > > jidan1@hotmail.com wrote:
> > >> Hi,
> > >>
> > >> I would like to configure a spartan-3 FPGA with an 5V CMOS
> > >> microcontroller. I have read xilinx database answer regarding how to
> > >> make 3.3V I/O input pins 5V tolerant with a serial resistor (300Ohm).
> > >>
> > >> 1) Can also the confg. dedicated pins made 5V tolerant through a ser=
ial
> > >> resistor although they are powered from 2.5V? (I calculated this an I
> > >> came to Rser=3D220OHM)
> > >> 2) The VIH of my microcontroller is 3V, that of spartan-3 I/O's is
> > >> (VCCO=3D3.3V) is 2.9V. Do I need level-shifters to drive my =B5C? If=
 yes,
> > >> what IC's would you recommend?
> > >>
> > >> Regarding 1:
> > > I would use 1 kilohm. No need to push more current than necessary.
> > > Regarding 2:
> > > You quote worst-case numbers that assum lowest Vcc on the FPGA and
> > > higest possible Vcc on the uP.
> > > Keep the FPGA fed with at least 3.2 V, and you will see that same
> > > voltage on the output (this is CMOS !), and keep the uP Vcc slightly
> > > below 5V.
> > > But you will not have much noise immunity.
> > > Peter Alfke
> > >

jidan1@hotmail.com wrote:

> Thank you Austin  and Peter for you replies.
> 
> I still have 2 questions
> 
> 1)a) So, you suggest using a 1k ohm serial resistor to interface the 5V
> signal to 2.5V input. May I know how you came to this number?
> b) For the 5V -> 3.3V interface, xilinx application suggests a
> Rser=300Ohm. Should I also replace this with a Rser=1kohm?

Use the largest value that works, and you can also parallel a small C.
That's what the universal programmers do, for wide pin voltage 
compliance, and keeps the edges fast enough to avoid problems.

> 
> 2)Why use a parralell resistor to the voltage regulator and waste power
> to handle the reverse current. Why not just add a reverse biased
> schotkey diode from the output to the input of the voltage regulator?

Or, you can use a DDR regulator : they are designed for source and sink.
(if you expect a lot of unknown injection effects, tho worrying about
mA in a Spartan-3 design is a little ?? )

-jg

Jim,

DDR regulator?  I must have missed this new term.

Do you have an example?|

Asutin

On Tue, 12 Sep 2006 14:26:20 -0700, Austin Lesea wrote:

> Answers below,
> 
> Austin
> 
> jidan1@hotmail.com wrote:
>> Thank you Austin  and Peter for you replies.
>> 
>> I still have 2 questions
>> 
>> 1)a) So, you suggest using a 1k ohm serial resistor to interface the 5V
>> signal to 2.5V input. May I know how you came to this number?
>> b) For the 5V -> 3.3V interface, xilinx application suggests a
>> Rser=300Ohm. Should I also replace this with a Rser=1kohm?
> 
> The value is up to you:  the choice is for speed, signal integrity, etc.
>  Fast would be the smallest value, slower is a larger value.  Peter's
> point is that if this is a slow interface (usually is), you don't need
> low resistance.
> 
>> 
>> 2)Why use a parralell resistor to the voltage regulator and waste power
>> to handle the reverse current. Why not just add a reverse biased
>> schotkey diode from the output to the input of the voltage regulator?
> 
> We are not interested in protecting the regulator.  What if the current
> forces the 2.5V Vcco and Vccaux to 5 volts?  The the chip blows up...



Another solution if you are worried about power consumption is a humble
$.14 TL431 shunt regulator - good for up to 100 mA. We use this on some of
our designs (on Spartan 2, making sure the the 3.3v rail doesnt get pulled
up too high by 5V pullups on I/O pins) I'd set the TL431 for
about 2.75V on the 2.5V rail...

Peter Wallace

Austin Lesea wrote:

> Jim,
> 
> DDR regulator?  I must have missed this new term.
> 
> Do you have an example?|

Sure, Go to Linear or Maxim's web sites, and search for DDR regulator.
These target the Vtt terminations on DDR memory busses, and they can
source and sink current.

-jg